Lines Matching full:l2
16 /* L2 cache Register Offset */
26 /* L2 cache config registers bitfields */
31 /* L2 cache control registers bitfields */
36 /* L2 cache CCTL Access Line registers bitfields */
39 /* L2 CCTL Command */
121 /* Wait L2 CCTL Commands finished */ in nds_l2_cache_all()
137 /* Wait L2 CCTL Commands finished */ in nds_l2_cache_all()
178 /* Wait L2 CCTL Commands finished */ in nds_l2_cache_range()
220 /* Check L2 cache feature from SMU */ in nds_l2_cache_init()
223 /* Platform doesn't support L2 cache controller */ in nds_l2_cache_init()
253 /* Initializing L2 cache instruction, data prefetch depth */ in nds_l2_cache_init()