4  * SPDX-License-Identifier: Apache-2.0
74 static ALWAYS_INLINE int nds_l2_cache_range(void *addr, size_t size, int op) { return 0; }  in nds_l2_cache_range()  argument
75 static ALWAYS_INLINE int nds_l2_cache_all(int op) { return 0; }  in nds_l2_cache_all()  argument
85 	last_byte = (unsigned long)addr + size - 1;  in nds_cctl_range_operations()
89 	 * In memory access privilige U mode, applications should use ucctl CSRs  in nds_cctl_range_operations()
109 static ALWAYS_INLINE int nds_l1i_cache_all(int op)  in nds_l1i_cache_all()  argument
116 		 * In memory access privilige U mode, applications can only use  in nds_l1i_cache_all()
120 			return -ENOTSUP;  in nds_l1i_cache_all()
124 	if (op == K_CACHE_INVD) {  in nds_l1i_cache_all()
138 static ALWAYS_INLINE int nds_l1d_cache_all(int op)  in nds_l1d_cache_all()  argument
144 		 * In memory access privilige U mode, applications can only use  in nds_l1d_cache_all()
148 			return -ENOTSUP;  in nds_l1d_cache_all()
152 	switch (op) {  in nds_l1d_cache_all()
163 		return -ENOTSUP;  in nds_l1d_cache_all()
169 static ALWAYS_INLINE int nds_l1i_cache_range(void *addr, size_t size, int op)  in nds_l1i_cache_range()  argument
173 	if (op == K_CACHE_INVD) {  in nds_l1i_cache_range()
181 static ALWAYS_INLINE int nds_l1d_cache_range(void *addr, size_t size, int op)  in nds_l1d_cache_range()  argument
185 	switch (op) {  in nds_l1d_cache_range()
196 		return -ENOTSUP;  in nds_l1d_cache_range()
213 		/* Enable D-cache coherence management */  in cache_data_enable()
224 		/* Enable D-cache */  in cache_data_enable()
290 		return -ENOTSUP;  in cache_data_invd_all()
313 		return -ENOTSUP;  in cache_data_invd_range()
333 		return -ENOTSUP;  in cache_instr_invd_all()
337 		return -ENOTSUP;  in cache_instr_invd_all()
341 		/*  CCTL IX type command is not to RISC-V Smepmp */  in cache_instr_invd_all()
345 					return -ENOTSUP;  in cache_instr_invd_all()
352 					return -ENOTSUP;  in cache_instr_invd_all()
370 		return -ENOTSUP;  in cache_instr_invd_range()
377 		return -ENOTSUP;  in cache_instr_invd_range()
392 		return -ENOTSUP;  in cache_data_flush_all()
412 		return -ENOTSUP;  in cache_data_flush_range()
432 		return -ENOTSUP;  in cache_data_flush_and_invd_all()
457 		return -ENOTSUP;  in cache_data_flush_and_invd_range()
479 	return -ENOTSUP;  in cache_instr_flush_all()
484 	return -ENOTSUP;  in cache_instr_flush_and_invd_all()
492 	return -ENOTSUP;  in cache_instr_flush_range()
500 	return -ENOTSUP;  in cache_instr_flush_and_invd_range()
525 			LOG_ERR("Platform doesn't support I-cache, "  in andes_cache_init()
533 			LOG_ERR("Unknown line size of I-cache");  in andes_cache_init()
541 		LOG_ERR("Please specific the i-cache-line-size "  in andes_cache_init()
549 			LOG_ERR("Platform doesn't support D-cache, "  in andes_cache_init()
557 			LOG_ERR("Unknown line size of D-cache");  in andes_cache_init()
565 		LOG_ERR("Please specific the d-cache-line-size "  in andes_cache_init()