Lines Matching +full:0 +full:- +full:7

4  * SPDX-License-Identifier: Apache-2.0
15 #define PAGE_CONTROL_ADDR	0
18 #define SOFT_RESET_ADDR		(struct reg_addr){0, 1}
21 #define NDAC_DIV_ADDR		(struct reg_addr){0, 11}
22 #define NDAC_POWER_UP		BIT(7)
23 #define NDAC_POWER_UP_MASK	BIT(7)
24 #define NDAC_DIV_MASK		BIT_MASK(7)
27 #define MDAC_DIV_ADDR		(struct reg_addr){0, 12}
28 #define MDAC_POWER_UP		BIT(7)
29 #define MDAC_POWER_UP_MASK	BIT(7)
30 #define MDAC_DIV_MASK		BIT_MASK(7)
35 #define OSR_MSB_ADDR		(struct reg_addr){0, 13}
38 #define OSR_LSB_ADDR		(struct reg_addr){0, 14}
44 #define IF_CTRL1_ADDR		(struct reg_addr){0, 27}
46 #define IF_CTRL_IFTYPE_I2S	0
53 #define IF_CTRL_WLEN_16		0
60 #define BCLK_DIV_ADDR		(struct reg_addr){0, 30}
61 #define BCLK_DIV_POWER_UP	BIT(7)
62 #define BCLK_DIV_POWER_UP_MASK	BIT(7)
63 #define BCLK_DIV_MASK		BIT_MASK(7)
66 #define OVF_FLAG_ADDR		(struct reg_addr){0, 39}
68 #define PROC_BLK_SEL_ADDR	(struct reg_addr){0, 60}
72 #define DATA_PATH_SETUP_ADDR	(struct reg_addr){0, 63}
73 #define DAC_LR_POWERUP_DEFAULT	(BIT(7) | BIT(6) | BIT(4) | BIT(2))
76 #define VOL_CTRL_ADDR		(struct reg_addr){0, 64}
77 #define VOL_CTRL_UNMUTE_DEFAULT	(0)
80 #define L_DIG_VOL_CTRL_ADDR	(struct reg_addr){0, 65}
81 #define DRC_CTRL1_ADDR		(struct reg_addr){0, 68}
82 #define L_BEEP_GEN_ADDR		(struct reg_addr){0, 71}
83 #define BEEP_GEN_EN_BEEP	(BIT(7))
84 #define R_BEEP_GEN_ADDR		(struct reg_addr){0, 72}
85 #define BEEP_LEN_MSB_ADDR	(struct reg_addr){0, 73}
86 #define BEEP_LEN_MIB_ADDR	(struct reg_addr){0, 74}
87 #define BEEP_LEN_LSB_ADDR	(struct reg_addr){0, 75}
91 #define HEADPHONE_DRV_POWERUP	(BIT(7) | BIT(6))
97 #define HP_OUT_POP_RM_ENABLE	(BIT(7))
105 #define HPX_ANA_VOL_ENABLE	(BIT(7))
106 #define HPX_ANA_VOL_MASK	(BIT_MASK(7))
109 #define HPX_ANA_VOL_MAX		(0)
125 #define TIMER_MCLK_DIV_EN_EXT	(BIT(7))
126 #define TIMER_MCLK_DIV_MASK	(BIT_MASK(7))
148 	CM_VOLTAGE_1P35 = 0,