43 static void codec_write_reg(const struct device *dev, struct reg_addr reg,
114 	codec_write_reg(dev, DATA_PATH_SETUP_ADDR, DAC_LR_POWERUP_DEFAULT);  in codec_start_output()
117 	codec_write_reg(dev, VOL_CTRL_ADDR, VOL_CTRL_UNMUTE_DEFAULT);  in codec_start_output()
125 	codec_write_reg(dev, VOL_CTRL_ADDR, VOL_CTRL_MUTE_DEFAULT);  in codec_stop_output()
128 	codec_write_reg(dev, DATA_PATH_SETUP_ADDR, DAC_LR_POWERDN_DEFAULT);  in codec_stop_output()
134 	codec_write_reg(dev, VOL_CTRL_ADDR, VOL_CTRL_MUTE_DEFAULT);  in codec_mute_output()
140 	codec_write_reg(dev, VOL_CTRL_ADDR, VOL_CTRL_UNMUTE_DEFAULT);  in codec_unmute_output()
180 static void codec_write_reg(const struct device *dev, struct reg_addr reg,  in codec_write_reg()  function
217 	codec_write_reg(dev, SOFT_RESET_ADDR, SOFT_RESET_ASSERT);  in codec_soft_reset()
253 	codec_write_reg(dev, IF_CTRL1_ADDR, val);  in codec_configure_dai()
329 		codec_write_reg(dev, BCLK_DIV_ADDR,  in codec_configure_clocks()
334 	codec_write_reg(dev, NDAC_DIV_ADDR,  in codec_configure_clocks()
336 	codec_write_reg(dev, MDAC_DIV_ADDR,  in codec_configure_clocks()
338 	codec_write_reg(dev, OSR_MSB_ADDR, (uint8_t)((osr >> 8) & OSR_MSB_MASK));  in codec_configure_clocks()
339 	codec_write_reg(dev, OSR_LSB_ADDR, (uint8_t)(osr & OSR_LSB_MASK));  in codec_configure_clocks()
342 		codec_write_reg(dev, BCLK_DIV_ADDR,  in codec_configure_clocks()
349 	codec_write_reg(dev, TIMER_MCLK_DIV_ADDR,  in codec_configure_clocks()
376 	codec_write_reg(dev, PROC_BLK_SEL_ADDR, PROC_BLK_SEL(proc_blk));  in codec_configure_filters()
408 	codec_write_reg(dev, HEADPHONE_DRV_ADDR, val);  in codec_configure_output()
412 	codec_write_reg(dev, HP_OUT_POP_RM_ADDR, val | HP_OUT_POP_RM_ENABLE);  in codec_configure_output()
416 	codec_write_reg(dev, OUTPUT_ROUTING_ADDR, val);  in codec_configure_output()
419 	codec_write_reg(dev, HPL_ANA_VOL_CTRL_ADDR,  in codec_configure_output()
421 	codec_write_reg(dev, HPR_ANA_VOL_CTRL_ADDR,  in codec_configure_output()
425 	codec_write_reg(dev, HEADPHONE_DRV_CTRL_ADDR, HEADPHONE_DRV_LINEOUT);  in codec_configure_output()
428 	codec_write_reg(dev, HPL_DRV_GAIN_CTRL_ADDR, HPX_DRV_UNMUTE);  in codec_configure_output()
429 	codec_write_reg(dev, HPR_DRV_GAIN_CTRL_ADDR, HPX_DRV_UNMUTE);  in codec_configure_output()
434 	codec_write_reg(dev, HEADPHONE_DRV_ADDR, val);  in codec_configure_output()
470 	codec_write_reg(dev, HPL_ANA_VOL_CTRL_ADDR, HPX_ANA_VOL(vol_val));  in codec_set_output_volume()
471 	codec_write_reg(dev, HPR_ANA_VOL_CTRL_ADDR, HPX_ANA_VOL(vol_val));  in codec_set_output_volume()