Lines Matching refs:reg_config
102 tla202x_reg_config_t reg_config[MAX_CHANNELS]; member
148 tla202x_reg_config_t *reg_config = &data->reg_config[cfg->channel_id]; in tla202x_channel_setup() local
151 *reg_config &= ~REG_CONFIG_PGA_msk; in tla202x_channel_setup()
154 *reg_config |= PGA_6144 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
157 *reg_config |= PGA_4096 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
160 *reg_config |= PGA_2048 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
163 *reg_config |= PGA_1024 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
166 *reg_config |= PGA_512 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
169 *reg_config |= PGA_256 << REG_CONFIG_PGA_pos; in tla202x_channel_setup()
187 *reg_config &= ~REG_CONFIG_MUX_msk; in tla202x_channel_setup()
191 *reg_config |= MUX_DIFF_0_1 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
193 *reg_config |= MUX_DIFF_0_3 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
195 *reg_config |= MUX_DIFF_1_3 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
197 *reg_config |= MUX_DIFF_2_3 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
204 *reg_config |= MUX_SINGLE_0 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
206 *reg_config |= MUX_SINGLE_1 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
208 *reg_config |= MUX_SINGLE_2 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
210 *reg_config |= MUX_SINGLE_3 << REG_CONFIG_MUX_pos; in tla202x_channel_setup()
309 reg = data->reg_config[ch]; in tla202x_perform_read()
406 data->reg_config[ch] = REG_CONFIG_DEFAULT; in tla202x_init()
409 ret = tla202x_write_register(dev, REG_CONFIG, data->reg_config[0]); in tla202x_init()