1714 #define ADC_DMA_CHANNEL_INIT(index, src_dev, dest_dev)					\  argument
1716 		.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_IDX(index, 0)),		\
1717 		.channel = DT_INST_DMAS_CELL_BY_IDX(index, 0, channel),			\
1719 			.dma_slot = STM32_DMA_SLOT_BY_IDX(index, 0, slot),		\
1721 				STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),		\
1723 				STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),		\
1725 				STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),		\
1729 				STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),		\
1734 			STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),			\
1736 			STM32_DMA_CHANNEL_CONFIG_BY_IDX(index, 0)),			\
1739 #define ADC_STM32_IRQ_FUNC(index)					\  argument
1770 #define FIRST_WITH_IRQN_INTERNAL(index, irqn)                                                      \  argument
1771 	COND_CODE_1(IS_EQ(irqn, DT_INST_IRQN(index)), (index,), (EMPTY,))
1784 #define FIRST_WITH_IRQN(index)                                                                     \  argument
1786 								       DT_INST_IRQN(index))))
1795 #define HANDLE_IRQS(index, irqn)                                                                   \  argument
1796 	COND_CODE_1(IS_EQ(irqn, DT_INST_IRQN(index)), (adc_stm32_isr(DEVICE_DT_INST_GET(index));), \
1804 #define ISR_FUNC(index) UTIL_CAT(adc_stm32_isr_, DT_INST_IRQN(index))  argument
1814 #define GENERATE_ISR_CODE(index)                                                                   \  argument
1815 	static void ISR_FUNC(index)(void)                                                          \
1817 		DT_INST_FOREACH_STATUS_OKAY_VARGS(HANDLE_IRQS, DT_INST_IRQN(index))                \
1820 	static void UTIL_CAT(ISR_FUNC(index), _init)(void)                                         \
1822 		IRQ_CONNECT(DT_INST_IRQN(index), DT_INST_IRQ(index, priority), ISR_FUNC(index),    \
1824 		irq_enable(DT_INST_IRQN(index));                                                   \
1833 #define GENERATE_ISR(index)                                                                        \  argument
1834 	COND_CODE_1(IS_EQ(index, FIRST_WITH_IRQN(index)), (GENERATE_ISR_CODE(index)), (EMPTY))
1839 #define ADC_STM32_IRQ_FUNC(index)                                                                  \  argument
1840 	.irq_cfg_func = COND_CODE_1(IS_EQ(index, FIRST_WITH_IRQN(index)),                          \
1841 				    (UTIL_CAT(ISR_FUNC(index), _init)), (NULL)),
1843 #define ADC_DMA_CHANNEL_INIT(index, src_dev, dest_dev)  argument
1852 #define ADC_STM32_INIT(index)						\  argument
1854 ADC_STM32_CHECK_DT_CLOCK(index);					\
1856 PINCTRL_DT_INST_DEFINE(index);						\
1858 static const struct stm32_pclken pclken_##index[] =			\
1859 				 STM32_DT_INST_CLOCKS(index);		\
1861 static const struct adc_stm32_cfg adc_stm32_cfg_##index = {		\
1862 	.base = (ADC_TypeDef *)DT_INST_REG_ADDR(index),			\
1863 	ADC_STM32_IRQ_FUNC(index)					\
1864 	.pclken = pclken_##index,					\
1865 	.pclk_len = DT_INST_NUM_CLOCKS(index),				\
1866 	.clk_prescaler = ADC_STM32_DT_PRESC(index),			\
1867 	.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index),			\
1868 	.sequencer_type = DT_INST_STRING_UPPER_TOKEN(index, st_adc_sequencer),	\
1869 	.oversampler_type = DT_INST_STRING_UPPER_TOKEN(index, st_adc_oversampler),	\
1870 	.sampling_time_table = DT_INST_PROP(index, sampling_times),	\
1872 		DT_INST_PROP_OR(index, num_sampling_time_common_channels, 0),\
1873 	.res_table_size = DT_INST_PROP_LEN(index, resolutions),		\
1874 	.res_table = DT_INST_PROP(index, resolutions),			\
1877 static struct adc_stm32_data adc_stm32_data_##index = {			\
1878 	ADC_CONTEXT_INIT_TIMER(adc_stm32_data_##index, ctx),		\
1879 	ADC_CONTEXT_INIT_LOCK(adc_stm32_data_##index, ctx),		\
1880 	ADC_CONTEXT_INIT_SYNC(adc_stm32_data_##index, ctx),		\
1881 	ADC_DMA_CHANNEL(index, PERIPHERAL, MEMORY)			\
1884 PM_DEVICE_DT_INST_DEFINE(index, adc_stm32_pm_action);			\
1886 DEVICE_DT_INST_DEFINE(index,						\
1887 		    &adc_stm32_init, PM_DEVICE_DT_INST_GET(index),	\
1888 		    &adc_stm32_data_##index, &adc_stm32_cfg_##index,	\