Lines Matching +full:negative +full:- +full:mux +full:- +full:input

4  * SPDX-License-Identifier: Apache-2.0
241 k_sem_give(&data->data_ready_signal); in max1125x_data_ready_handler()
248 const struct max1125x_config *config = dev->config; in max1125x_read_reg()
271 ret = spi_transceive_dt(&config->bus, &tx, &rx); in max1125x_read_reg()
286 const struct max1125x_config *config = dev->config; in max1125x_write_reg()
293 ret = spi_write_dt(&config->bus, &tx); in max1125x_write_reg()
305 const struct max1125x_config *config = dev->config; in max1125x_send_command()
310 ret = spi_write_dt(&config->bus, &tx); in max1125x_send_command()
321 const struct max1125x_data *data = dev->data; in max1125x_start_conversion()
323 return max1125x_send_command(dev, MAX1125X_CMD_SEQUENCER, data->rate); in max1125x_start_conversion()
328 struct max1125x_data *data = dev->data; in max1125x_acq_time_to_dr()
329 const struct max1125x_config *config = dev->config; in max1125x_acq_time_to_dr()
330 const uint32_t *odr_delay = config->odr_delay; in max1125x_acq_time_to_dr()
333 int odr = -EINVAL; in max1125x_acq_time_to_dr()
337 return -EINVAL; in max1125x_acq_time_to_dr()
342 return -EINVAL; in max1125x_acq_time_to_dr()
348 data->rate = odr; in max1125x_acq_time_to_dr()
355 struct max1125x_data *data = dev->data; in max1125x_wait_data_ready()
357 return k_sem_take(&data->data_ready_signal, ADC_CONTEXT_WAIT_FOR_COMPLETION_TIMEOUT); in max1125x_wait_data_ready()
362 const struct max1125x_config *config = dev->config; in max1125x_read_sample()
363 struct max1125x_data *data = dev->data; in max1125x_read_sample()
365 uint8_t buffer_tx[(config->resolution / 8) + 1]; in max1125x_read_sample()
367 uint8_t current_channel = find_msb_set(data->ctx.sequence.channels) - 1; in max1125x_read_sample()
389 rc = spi_transceive_dt(&config->bus, &tx, &rx); in max1125x_read_sample()
396 * In offset binary format the most negative value is 0x000000, in max1125x_read_sample()
401 * negative full-scale value is 0x800000, the midscale is 0x000000 in max1125x_read_sample()
402 * and the positive full scale is 0x7FFFFF. Any input exceeding in max1125x_read_sample()
403 * the available input range is limited to the minimum or maximum in max1125x_read_sample()
406 is_positive = buffer_rx[(config->resolution / 8)] >> 7; in max1125x_read_sample()
408 *data->buffer++ = sys_get_be24(buffer_rx) - (1 << (config->resolution - 1)); in max1125x_read_sample()
410 *data->buffer++ = sys_get_be24(buffer_rx + 1); in max1125x_read_sample()
413 adc_context_on_sampling_done(&data->ctx, dev); in max1125x_read_sample()
426 return -EINVAL; in max1125x_configure_chmap()
501 const struct max1125x_config *max_config = dev->config; in max1125x_channel_setup()
514 if (max_config->multiplexer) { in max1125x_channel_setup()
515 if (!channel_cfg->differential) { in max1125x_channel_setup()
518 channel_cfg->differential); in max1125x_channel_setup()
519 return -ENOTSUP; in max1125x_channel_setup()
523 max1125x_acq_time_to_dr(dev, channel_cfg->acquisition_time); in max1125x_channel_setup()
526 if (max_config->pga) { in max1125x_channel_setup()
529 switch (channel_cfg->gain) { in max1125x_channel_setup()
555 LOG_ERR("MAX1125X: unsupported channel gain '%d'", channel_cfg->gain); in max1125x_channel_setup()
556 return -ENOTSUP; in max1125x_channel_setup()
560 if (channel_cfg->reference == ADC_REF_INTERNAL) { in max1125x_channel_setup()
563 } else if (channel_cfg->reference == ADC_REF_EXTERNAL1) { in max1125x_channel_setup()
567 channel_cfg->reference); in max1125x_channel_setup()
568 return -ENOTSUP; in max1125x_channel_setup()
573 gpio_reg |= max_config->gpio.gpio0_enable << MAX1125X_GPIO_CTRL_GPIO0_EN; in max1125x_channel_setup()
574 gpio_reg |= max_config->gpio.gpio1_enable << MAX1125X_GPIO_CTRL_GPIO1_EN; in max1125x_channel_setup()
575 gpio_reg |= max_config->gpio.gpio0_direction << MAX1125X_GPIO_CTRL_DIRO; in max1125x_channel_setup()
576 gpio_reg |= max_config->gpio.gpio1_direction << MAX1125X_GPIO_CTRL_DIR1; in max1125x_channel_setup()
580 gpo_reg |= max_config->gpo.gpo0_enable << MAX1125X_GPO_DIR_GPO0; in max1125x_channel_setup()
581 gpo_reg |= max_config->gpo.gpo1_enable << MAX1125X_GPO_DIR_GPO1; in max1125x_channel_setup()
585 max1125x_configure_chmap(dev, channel_cfg->channel_id); in max1125x_channel_setup()
592 size_t needed = sizeof(uint8_t) * (sequence->resolution / 8); in max1125x_validate_buffer_size()
594 if (sequence->options) { in max1125x_validate_buffer_size()
595 needed *= (1 + sequence->options->extra_samplings); in max1125x_validate_buffer_size()
598 if (sequence->buffer_size < needed) { in max1125x_validate_buffer_size()
599 return -ENOMEM; in max1125x_validate_buffer_size()
609 if (sequence->oversampling) { in max1125x_validate_sequence()
611 return -ENOTSUP; in max1125x_validate_sequence()
617 return -ENOTSUP; in max1125x_validate_sequence()
628 data->buffer = data->repeat_buffer; in adc_context_update_buffer_pointer()
636 data->repeat_buffer = data->buffer; in adc_context_start_sampling()
638 max1125x_start_conversion(data->dev); in adc_context_start_sampling()
640 k_sem_give(&data->acq_sem); in adc_context_start_sampling()
646 struct max1125x_data *data = dev->data; in max1125x_adc_start_read()
653 data->buffer = sequence->buffer; in max1125x_adc_start_read()
655 adc_context_start_read(&data->ctx, sequence); in max1125x_adc_start_read()
657 return adc_context_wait_for_completion(&data->ctx); in max1125x_adc_start_read()
664 struct max1125x_data *data = dev->data; in max1125x_adc_read_async()
666 adc_context_lock(&data->ctx, async ? true : false, async); in max1125x_adc_read_async()
668 adc_context_release(&data->ctx, rc); in max1125x_adc_read_async()
675 struct max1125x_data *data = dev->data; in max1125x_adc_perform_read()
681 adc_context_complete(&data->ctx, rc); in max1125x_adc_perform_read()
699 struct max1125x_data *data = dev->data; in max1125x_acquisition_thread()
703 k_sem_take(&data->acq_sem, K_FOREVER); in max1125x_acquisition_thread()
708 adc_context_complete(&data->ctx, rc); in max1125x_acquisition_thread()
719 const struct max1125x_config *config = dev->config; in max1125x_init()
720 struct max1125x_data *data = dev->data; in max1125x_init()
722 data->dev = dev; in max1125x_init()
724 k_sem_init(&data->acq_sem, 0, 1); in max1125x_init()
725 k_sem_init(&data->data_ready_signal, 0, 1); in max1125x_init()
727 if (!spi_is_ready_dt(&config->bus)) { in max1125x_init()
728 LOG_ERR("spi bus %s not ready", config->bus.bus->name); in max1125x_init()
729 return -ENODEV; in max1125x_init()
732 if (config->self_calibration) { in max1125x_init()
737 err = gpio_pin_configure_dt(&config->drdy_gpio, GPIO_INPUT); in max1125x_init()
743 err = gpio_pin_interrupt_configure_dt(&config->drdy_gpio, GPIO_INT_EDGE_TO_ACTIVE); in max1125x_init()
746 return -EIO; in max1125x_init()
749 gpio_init_callback(&data->callback_data_ready, max1125x_data_ready_handler, in max1125x_init()
750 BIT(config->drdy_gpio.pin)); in max1125x_init()
751 err = gpio_add_callback(config->drdy_gpio.port, &data->callback_data_ready); in max1125x_init()
754 return -EIO; in max1125x_init()
758 &data->thread, data->stack, K_KERNEL_STACK_SIZEOF(data->stack), in max1125x_init()
763 adc_context_unlock_unconditionally(&data->ctx); in max1125x_init()
779 #define MAX1125X_INIT(t, n, odr_delay_us, res, mux, pgab) \ argument
786 .multiplexer = mux, \
806 /* Each data register is a 16-bit read-only register. Any attempt to write
811 * format the most negative value is 0x0000, the midscale value is 0x8000 and
815 * complement the negative full-scale value is 0x8000, the midscale is 0x0000
816 * and the positive full scale is 0x7FFF. Any input exceeding the available
817 * input range is limited to the minimum or maximum data value.
822 /* Each data register is a 24-bit read-only register. Any attempt to write
827 * the most negative value is 0x000000, the midscale value is 0x800000 and
830 * then the data format is two’s complement. In two’s complement the negative
831 * full-scale value is 0x800000, the midscale is 0x000000 and the positive
832 * full scale is 0x7FFFFF. Any input exceeding the available input range is
852 * MAX11253: 16 bit, 6-channel, programmable gain amplifier, delta-sigma
861 * MAX1125X: 24 bit, 6-channel, programmable gain amplifier, delta-sigma