Lines Matching refs:will

14 a supported dual processor device, they will both run simultaneously.
18 a uniprocessor kernel will be built. In general the platform default
19 will have enabled this anywhere it's supported. When enabled, the
21 :kconfig:option:`CONFIG_MP_MAX_NUM_CPUS`. Likewise, the default for this will be the
23 typical apps will change it. But it is legal and supported to set
40 does not: the fact that your CPU will not be interrupted while you are
42 will be running simultaneously and be inspecting or modifying the same
65 re-acquire it or it will deadlock (it is perfectly legal to nest
83 threads. The kernel will ensure that only one thread across all CPUs
86 when a thread is switched in. Other CPUs will spin waiting for the
107 :c:func:`k_thread_cpu_mask_disable` with a particular CPU ID will prevent
109 :c:func:`k_thread_cpu_mask_enable` will re-enable execution. There are also
113 suspended, otherwise an ``-EINVAL`` will be returned.
137 practice it uses the area that will become that CPU's interrupt
139 run on that CPU, and a pointer to a "start flag" address which will be
184 which when invoked will flag an interrupt on all CPUs (except the current one,
188 when invoked will flag an interrupt on the specified CPUs. When an interrupt is
190 scheduler will get invoked on those CPUs. The expectation is that these
191 APIs will evolve over time to encompass more functionality (e.g. cross-CPU
192 calls), and that the scheduler-specific calls here will be implemented in
195 Note that not all SMP architectures will have a usable IPI mechanism
214 have been idle CPUs), we broadcast an IPI. A foreign CPU will then be
215 able to see the new thread when exiting from the interrupt and will
219 will not work to synchronously run new threads. The workaround in
220 that case is more invasive: Zephyr will **not** enter the system idle
221 handler and will instead spin in its idle loop, testing the scheduler
225 IPI, and this code will only be used for testing purposes or on
254 acceptable, enabling :kconfig:option:`CONFIG_SCHED_IPI_CASCADE` will allow the
271 code, will work correctly regardless of the number of CPUs available.
293 context. The expectation is that :c:func:`arch_curr_cpu` will be
315 offset. That technique will not work in SMP, because the other CPU