Lines Matching +full:non +full:- +full:shared

11     based on ARM Cortex-M SoCs supporting the Floating Point Extension,
46 be used by any thread (initialization in skipped on ARM Cortex-M platforms and
55 Shared FP registers mode
60 the kernel supports one or more of the following thread sub-classes:
62 * non-user: A thread that cannot use any floating point registers
75 ARM Cortex-M architecture (with the Floating Point Extension)
76 -------------------------------------------------------------
79     The Shared FP registers mode is the default Floating Point
80     Services mode in ARM Cortex-M.
82 On the ARM Cortex-M architecture with the Floating Point Extension, the kernel
83 treats *all* threads as FPU users when shared FP registers mode is enabled.
91 * A statically-created ARM thread can be pretagged by passing the
94 * A dynamically-created ARM thread can be pretagged by passing the
98 MPU-based stack protection mechanism to properly configure the size of
102 During thread context switching the ARM kernel saves the *callee-saved*
103 floating point registers, if the switched-out thread has been using them.
104 Additionally, the *caller-saved* floating point registers are saved on
105 the thread's stack. If the switched-in thread has been using the floating
106 point registers, the kernel restores the *callee-saved* FP registers of
107 the switched-in thread and the *caller-saved* FP context is restored from
112 an extra 72 bytes of stack space where the callee-saved FP context can
117 is currently enabled in Zephyr applications on ARM Cortex-M
121 When the MPU-based stack protection mechanism is not enabled, lazy stacking
122 is always active in the Zephyr application. When the MPU-based stack protection
137 ------------------
140     The Shared FP registers mode is the default Floating Point
146 user on a case-by-case basis. A "lazy save" algorithm is used during context
149 FPU user to a non-user thread, and then back to the original FPU user.
159 Each thread object becomes 512 bytes larger when Shared FP registers mode
163 ------------------
165 On the ARCv2 architecture, the kernel treats each thread as a non-user
169 * A statically-created ARC thread can be tagged by passing the
172 * A dynamically-created ARC thread can be tagged by passing the
179 During thread context switching the ARC kernel saves the *callee-saved*
180 floating point registers, if the switched-out thread has been using them.
181 Additionally, the *caller-saved* floating point registers are saved on
182 the thread's stack. If the switched-in thread has been using the floating
183 point registers, the kernel restores the *callee-saved* FP registers of
184 the switched-in thread and the *caller-saved* FP context is restored from
190 RISC-V architecture
191 -------------------
193 On the RISC-V architecture the kernel treats each thread as an FPU
194 user on a case-by-case basis with the FPU access allocated on demand.
198 FPU user to a non-user thread (or an FPU user that doesn't touch the FPU
215 that first thread will be subjected to the on-demand regime and won't have
221 Each thread object becomes 136 bytes (single-precision floating point
222 hardware) or 264 bytes (double-precision floating point hardware) larger
223 when Shared FP registers mode is enabled.
226 ------------------
228 On the SPARC architecture, the kernel treats each thread as a non-user
232 * A statically-created thread can be tagged by passing the
235 * A dynamically-created thread can be tagged by passing the
240 the switched-out thread. Floating point registers are saved on the thread's
254 ----------------
256 On the x86 architecture the kernel treats each thread as a non-user,
257 FPU user or SSE user on a case-by-case basis. A "lazy save" algorithm is used
260 switching from an FPU user to a non-user thread, and then back to the original
279 handling overhead involved in auto-tagging threads, it is possible to
282 * A statically-created x86 thread can be pretagged by passing the
286 * A dynamically-created x86 thread can be pretagged by passing the
290 * An already-created x86 thread can pretag itself once it has started
299 When the thread again needs to use the floating point registers it can re-tag
315 .. code-block:: c
345 To configure shared FP registers mode, enable both the :kconfig:option:`CONFIG_FPU`