Lines Matching refs:ISR
6 An :dfn:`interrupt service routine` (ISR) is a function that executes
8 An ISR normally preempts the execution of the current thread,
10 Thread execution resumes only once all ISR work has been completed.
22 An ISR has the following key properties:
24 * An **interrupt request (IRQ) signal** that triggers the ISR.
30 to associate a given interrupt source with a given ISR.
31 Only a single ISR can be associated with a specific IRQ at any given time.
36 (usually of the same type). The argument value passed to an ISR's function
39 The kernel provides a default ISR for all unused IDT entries. This ISR
42 The kernel supports **interrupt nesting**. This allows an ISR to be preempted
44 priority ISR resumes execution once the higher priority ISR has completed
47 An ISR executes in the kernel's **interrupt context**. This context has its
58 a thread or as part of an ISR.
77 Service Routine (ISR). Each interrupt level is given a byte within this 32-bit
158 so its associated ISR does not execute when the IRQ is signaled.
159 The IRQ must be subsequently **enabled** to permit the ISR to execute.
163 by the associated ISR, not just the thread that disabled the IRQ.
194 Offloading ISR Work
197 An ISR should execute quickly to ensure predictable system operation.
198 If time consuming processing is required the ISR should offload some or all
205 * An ISR can signal a helper thread to do interrupt-related processing
208 * An ISR can instruct the system workqueue thread to execute a work item.
211 When an ISR offloads work to a thread, there is typically a single context
212 switch to that thread when the ISR completes, allowing interrupt-related
230 a second ISR/argument pair on the same interrupt line is made (using
232 become shared, meaning the two ISR/argument pairs (previous one and the one that
244 After an ISR is disconnected, whenever the interrupt line for which it was
245 register gets triggered, the ISR will no longer get invoked.
253 Defining a regular ISR
256 An ISR is defined at runtime by calling :c:macro:`IRQ_CONNECT`. It must
265 The following code defines and enables an ISR.
277 ... /* ISR code */
309 Defining a 'direct' ISR
315 * The argument to the ISR is retrieved and passed to the ISR
318 will be resumed from low-power state before the ISR is executed, which can be
332 The following code demonstrates a direct ISR:
394 The same restrictions regarding :c:macro:`IRQ_CONNECT` described in `Defining a regular ISR`_
406 Dynamically disconnecting an ISR
410 ISR is disconnected during runtime.
502 /** ISR to call */
525 software ISR table that are then compiled and linked into the final
545 kernel interrupt bookkeeping and looks up the ISR and parameter from the
546 software ISR table.
561 SW ISR Table
572 This is used by the common software IRQ handler to look up the ISR and its
576 Shared SW ISR Table
590 replace the currently registered ISR in _sw_isr_table. This special ISR will
691 no foolproof way to determine which vector was fired, so a software ISR table
694 code in :c:func:`_interrupt_enter` with the ISR and parameter as arguments.
697 ISR is placed directly in the IDT.
733 Use a regular or direct ISR to perform interrupt processing that requires a
738 should be handed off to a thread. See `Offloading ISR Work`_ for