Lines Matching +full:dma +full:- +full:enabled

15   The information here assumes that the architecture-specific MPU support is
16   enabled. See the architecture-specific documentation for details.
23   with external hardware like DMA controllers or foreign CPUs running a
30 of this, data moved into and out of memory by DMA engines will be stale in the
32 moving data using DMA and the processor doesn't see the data you expect, cache
40 coherence is more important than performance, such as when using DMA with SPI.
45 ---------------------------------
52 * :kconfig:option:`CONFIG_DCACHE`: DCACHE control enabled in Zephyr.
54 * :kconfig:option:`CONFIG_CACHE_MANAGEMENT`: cache API enabled.
59 -------------------------------------
68 * :kconfig:option:`CONFIG_DCACHE`: DCACHE control enabled in Zephyr.
70 * :kconfig:option:`CONFIG_MEM_ATTR`: enable the ``mem-attr`` library for
75 Assuming the MPU driver is enabled, it will configure the specified regions
81 .. code-block:: c
95 -------------------------------------------
107 * :kconfig:option:`CONFIG_DCACHE`: DCACHE control enabled in Zephyr.
114 .. code-block:: c
125 ---------------------
145   Some architectures support a cache configuration called **write-through**
157 In some cases, the same buffer may be reused for e.g. DMA reads and DMA writes.
164 * :kconfig:option:`CONFIG_DCACHE`: DCACHE control enabled in Zephyr.
166 * :kconfig:option:`CONFIG_CACHE_MANAGEMENT`: cache API enabled.
175 ---------
181 .. code-block:: c