Lines Matching full:9
38 -config=MC3R1.D4.9,macros+={deliberate,"name(ARG_UNUSED)"}
39 -config=MC3R1.D4.9,macros+={deliberate,"name(CONSTEXPR)"}
40 -config=MC3R1.D4.9,macros+={deliberate,"name(compiler_barrier)"}
41 -config=MC3R1.D4.9,macros+={deliberate,"name(likely)"}
42 -config=MC3R1.D4.9,macros+={deliberate,"name(unlikely)"}
46 -config=MC3R1.D4.9,macros+={questionable,"name(ATOMIC_ELEM)"}
47 -config=MC3R1.D4.9,macros+={questionable,"name(ATOMIC_MASK)"}
48 -config=MC3R1.D4.9,macros+={questionable,"name(BIT32)"}
49 -config=MC3R1.D4.9,macros+={questionable,"name(BIT64)"}
50 -config=MC3R1.D4.9,macros+={questionable,"name(BIT64_MASK)"}
51 -config=MC3R1.D4.9,macros+={questionable,"name(BIT_MASK)"}
52 -config=MC3R1.D4.9,macros+={questionable,"name(DEVICE_MMIO_GET)"}
53 -config=MC3R1.D4.9,macros+={questionable,"name(DEVICE_MMIO_MAP)"}
54 -config=MC3R1.D4.9,macros+={questionable,"name(DEVICE_MMIO_RAM_PTR)"}
55 -config=MC3R1.D4.9,macros+={questionable,"name(IN)"}
56 -config=MC3R1.D4.9,macros+={questionable,"name(LOG_CORE_INIT)"}
57 -config=MC3R1.D4.9,macros+={questionable,"name(MAX)"}
58 -config=MC3R1.D4.9,macros+={questionable,"name(MB)"}
59 -config=MC3R1.D4.9,macros+={questionable,"name(MIN)"}
60 -config=MC3R1.D4.9,macros+={questionable,"name(OUT)"}
61 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_BDF)"}
62 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_BDF_TO_BUS)"}
63 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_BAR_64)"}
64 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_BAR_ADDR)"}
65 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_BAR_INVAL_FLAGS)"}
66 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_BAR_IO)"}
67 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_BAR_MEM)"}
68 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_CAPPTR_FIRST)"}
69 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_CAP_ID)"}
70 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_CAP_NEXT)"}
71 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_EXT_CAP_ID)"}
72 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_EXT_CAP_NEXT)"}
73 -config=MC3R1.D4.9,macros+={questionable,"name(PCIE_CONF_INTR_IRQ)"}
74 -config=MC3R1.D4.9,macros+={questionable,"name(POINTER_TO_UINT)"}
75 -config=MC3R1.D4.9,macros+={questionable,"name(ROUND_DOWN)"}
76 -config=MC3R1.D4.9,macros+={questionable,"name(ROUND_UP)"}
77 -config=MC3R1.D4.9,macros+={questionable,"name(UINT_TO_POINTER)"}
78 -config=MC3R1.D4.9,macros+={questionable,"name(Z_BOOT_VIRT_TO_PHYS)"}
79 -config=MC3R1.D4.9,macros+={questionable,"name(Z_IRQ_TO_INTERRUPT_VECTOR)"}
80 -config=MC3R1.D4.9,macros+={questionable,"name(Z_KERNEL_STACK_SIZE_ADJUST)"}
81 -config=MC3R1.D4.9,macros+={questionable,"name(Z_LOG_MSG2_ALIGNED_WLEN)"}
82 -config=MC3R1.D4.9,macros+={questionable,"name(Z_MEM_PHYS_ADDR)"}
83 -config=MC3R1.D4.9,macros+={questionable,"name(Z_MEM_VIRT_ADDR)"}
84 -config=MC3R1.D4.9,macros+={questionable,"name(Z_STACK_PTR_ALIGN)"}
85 -config=MC3R1.D4.9,macros+={questionable,"name(Z_THREAD_STACK_SIZE_ADJUST)"}
86 -config=MC3R1.D4.9,macros+={questionable,"name(Z_TICK_ABS)"}
87 -config=MC3R1.D4.9,macros+={questionable,"name(ceiling_fraction)"}
88 -config=MC3R1.D4.9,macros+={questionable,"name(irq_enable)"}
89 -config=MC3R1.D4.9,macros+={questionable,"name(irq_lock)"}
90 -config=MC3R1.D4.9,macros+={questionable,"name(irq_unlock)"}
91 -config=MC3R1.D4.9,macros+={questionable,"name(k_panic)"}