Lines Matching +full:fault +full:- +full:gpios
2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750xbhx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "st,stm32h750b-dk";
19 zephyr,shell-uart = &usart3;
22 zephyr,flash-controller = &mt25ql512ab1;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM2";
31 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
35 compatible = "zephyr,memory-region";
37 zephyr,memory-region = "EXTMEM";
38 /* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */
39 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
43 compatible = "gpio-leds";
45 gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
49 gpios = <&gpioj 2 GPIO_ACTIVE_LOW>;
55 compatible = "gpio-keys";
58 gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
67 die-temp0 = &die_temp;
72 clock-frequency = <DT_FREQ_M(25)>;
73 hse-bypass;
82 pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_ph9
89 pinctrl-names = "default";
91 disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;
93 ext-sdram = <&sdram2>;
101 pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
102 display-timings {
103 compatible = "zephyr,panel-timing";
104 de-active = <1>;
105 pixelclk-active = <0>;
106 hsync-active = <0>;
107 vsync-active = <0>;
108 hsync-len = <1>;
109 vsync-len = <10>;
110 hback-porch = <43>;
111 vback-porch = <12>;
112 hfront-porch = <8>;
113 vfront-porch = <4>;
115 def-back-color-red = <0xFF>;
116 def-back-color-green = <0xFF>;
117 def-back-color-blue = <0xFF>;
121 div-m = <5>;
122 mul-n = <192>;
123 div-p = <2>;
124 div-q = <4>;
125 div-r = <4>;
131 div-m = <5>;
132 mul-n = <192>;
133 div-p = <2>;
134 div-q = <20>;
135 div-r = <99>;
142 clock-frequency = <DT_FREQ_M(480)>;
152 pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
153 pinctrl-names = "default";
154 current-speed = <115200>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6
165 dual-flash;
168 mt25ql512ab1: qspi-nor-flash-1@90000000 {
169 compatible = "st,stm32-qspi-nor";
171 qspi-max-frequency = <72000000>;
172 spi-bus-width = <4>;
173 reset-cmd;
177 compatible = "fixed-partitions";
178 #address-cells = <1>;
179 #size-cells = <1>;
187 mt25ql512ab2: qspi-nor-flash-2@90000000 {
188 compatible = "st,stm32-qspi-nor";
190 qspi-max-frequency = <72000000>;
196 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
207 pinctrl-names = "default";
212 power-up-delay = <100>;
213 num-auto-refresh = <8>;
214 mode-register = <0x230>;
215 refresh-rate = <0x603>;
218 st,sdram-control = <STM32_FMC_SDRAM_NC_8
226 st,sdram-timing = <2 7 4 7 2 2 2>;
242 st,adc-clock-source = "SYNC";
243 st,adc-prescaler = <4>;
250 dma-names = "tx", "rx";
251 pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
252 pinctrl-names = "default";
253 current-speed = <115200>;