Lines Matching +full:num +full:- +full:cs
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f746nghx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
17 compatible = "st,stm32f746g-disco";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
39 compatible = "gpio-keys";
48 compatible = "zephyr,lvgl-pointer-input";
53 compatible = "zephyr,memory-region", "mmio-sram";
56 zephyr,memory-region = "SDRAM1";
57 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
62 compatible = "zephyr,memory-region";
64 zephyr,memory-region = "EXTMEM";
66 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
80 clock-frequency = <DT_FREQ_M(25)>;
85 div-m = <25>;
86 mul-n = <432>;
87 div-p = <2>;
88 div-q = <9>;
95 clock-frequency = <DT_FREQ_M(216)>;
96 ahb-prescaler = <1>;
97 apb1-prescaler = <4>;
98 apb2-prescaler = <2>;
102 pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
103 pinctrl-names = "default";
105 clock-frequency = <I2C_BITRATE_FAST>;
109 pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
110 pinctrl-names = "default";
112 clock-frequency = <I2C_BITRATE_FAST>;
117 int-gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
122 pinctrl-0 = <&spi2_sck_pi1 &spi2_miso_pb14 &spi2_mosi_pb15>;
123 pinctrl-names = "default";
124 cs-gpios = <&gpioa 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
129 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
130 pinctrl-names = "default";
131 current-speed = <115200>;
136 pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
137 pinctrl-names = "default";
138 current-speed = <115200>;
143 pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
144 pinctrl-names = "default";
154 pinctrl-0 = <&tim3_ch1_pb4>;
155 pinctrl-names = "default";
171 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
174 pinctrl-names = "default";
175 cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
180 pinctrl-0 = <ð_mdc_pc1
189 pinctrl-names = "default";
190 phy-connection-type = "rmii";
194 pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
197 pinctrl-names = "default";
200 n25q128a1: qspi-nor-flash@90000000 {
201 compatible = "st,stm32-qspi-nor";
203 qspi-max-frequency = <72000000>;
207 compatible = "fixed-partitions";
208 #address-cells = <1>;
209 #size-cells = <1>;
212 label = "image-1";
225 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
236 pinctrl-names = "default";
241 power-up-delay = <100>;
242 num-auto-refresh = <8>;
243 mode-register = <0x220>;
246 * and is calculated as ((15.625 * SDRAM_CLK_MHZ) - 20)
249 refresh-rate = <1667>;
252 st,sdram-control = <STM32_FMC_SDRAM_NC_8
260 st,sdram-timing = <2 6 4 6 2 2 2>;
266 pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
273 pinctrl-names = "default";
274 disp-on-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
275 bl-ctrl-gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
276 ext-sdram = <&sdram1>;
281 pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
282 display-timings {
283 compatible = "zephyr,panel-timing";
284 de-active = <0>;
285 pixelclk-active = <0>;
286 hsync-active = <0>;
287 vsync-active = <0>;
288 hsync-len = <1>;
289 vsync-len = <10>;
290 hback-porch = <43>;
291 vback-porch = <12>;
292 hfront-porch = <8>;
293 vfront-porch = <4>;
295 def-back-color-red = <0xFF>;
296 def-back-color-green = <0xFF>;
297 def-back-color-blue = <0xFF>;