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6 The Nucleo U5A5ZJ Q board, featuring an ARM Cortex-M33 based STM32U5A5ZJ MCU,
13 - STM32U5A5ZJ microcontroller in LQFP144 package
14 - Internal SMPS to generate V core logic supply
15 - Two types of extension resources:
17 - Arduino Uno V3 connectivity
18 - ST morpho extension pin headers for full access to all STM32 I/Os
20 - On-board ST-LINK/V3E debugger/programmer
21 - Flexible board power supply:
23 - USB VBUS or external source(3.3V, 5V, 7 - 12V)
24 - ST-Link V3E
26 - Three users LEDs
27 - Two push-buttons: USER and RESET
28 - USB Type-C ™ Sink device FS
33 The STM32U5A5xx devices are an ultra-low-power microcontrollers family (STM32U5
34 Series) based on the high-performance Arm® Cortex®-M33 32-bit RISC core.
37 - Includes ST state-of-the-art patented technology
38 - Ultra-low-power with FlexPowerControl:
40 - 1.71 V to 3.6 V power supply
41 - -40 °C to +85/125 °C temperature range
42 - Low-power background autonomous mode (LPBAM): autonomous peripherals with
44 - VBAT mode: supply for RTC, 32 x 32-bit backup registers and 2-Kbyte backup SRAM
45 - 150 nA Shutdown mode (24 wake-up pins)
46 - 195 nA Standby mode (24 wake-up pins)
47 - 480 nA Standby mode with RTC
48 - 2 µA Stop 3 mode with 40-Kbyte SRAM
49 - 8.2 µA Stop 3 mode with 2.5-Mbyte SRAM
50 - 4.65 µA Stop 2 mode with 40-Kbyte SRAM
51 - 17.5 µA Stop 2 mode with 2.5-Mbyte SRAM
52 - 18.5 µA/MHz Run mode at 3.3 V
54 - Core:
56 - Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP,
58 - 32-Kbyte ICACHE allowing 0-wait-state execution from flash and external
60 - 16-Kbyte DCACHE1 for external memories
62 - Power management:
64 - Embedded regulator (LDO) and SMPSstep-down converter supporting switch
65 on-the-fly and voltage scaling
67 - Benchmarks:
69 - 1.5 DMIPS/MHz (Drystone 2.1)
70 - 655 CoreMark® (4.09 CoreMark®/MHz)
71 - 369 ULPMark™-CP
72 - 89 ULPMark™-PP
73 - 47.2 ULPMark™-CM
74 - 120000 SecureMark™-TLS
76 - Memories:
78 - 4-Mbyte flash memory with ECC, 2 banks readwhile-write, including 512 Kbytes
80 - With SRAM3 ECC off: 2514-Kbyte RAM including 66 Kbytes with ECC
81 - With SRAM3 ECC on: 2450-Kbyte RAMincluding 322 Kbytes with ECC
82 - External memory interface supporting SRAM,PSRAM, NOR, NAND, and FRAM memories
83 - 2 Octo-SPI memory interfaces
84 - 16-bit HSPI memory interface up to 160 MHz
86 - Rich graphic features:
88 - Neo-Chrom GPU (GPU2D) accelerating any angle rotation, scaling, and
90 - 16-Kbyte DCACHE2
91 - Chrom-ART Accelerator (DMA2D) for smoothmotion and transparency effects
92 - Chrom-GRC (GFXMMU) allowing up to 20 % of graphic resources optimization
93 - MIPI® DSI host controller with two DSI lanes running at up to 500 Mbit/s each
94 - LCD-TFT controller (LTDC)
95 - Digital camera interface
97 - General-purpose input/outputs:
99 - Up to 156 fast I/Os with interrupt capability most 5V-tolerant and
102 - Clock management:
104 - 4 to 50 MHz crystal oscillator
105 - 32 kHz crystal oscillator for RTC (LSE)
106 - Internal 16 MHz factory-trimmed RC (± 1 %)
107 - Internal low-power 32 kHz RC (± 5 %)
108 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one
110 - Internal 48 MHz
111 - 5 PLLs for system clock, USB, audio, ADC, DSI
113 - Security and cryptography:
115 - SESIP3 and PSA Level 3 Certified Assurance Target
116 - Arm® TrustZone® and securable I/Os, memories, and peripherals
117 - Flexible life cycle scheme with RDP andpassword-protected debug
118 - Root of trust thanks to unique boot entry and secure hide-protection area (HDP)
119 - Secure firmware installation (SFI) thanks to embedded root secure services (RSS)
120 - Secure data storage with hardware unique key (HUK)
121 - Secure firmware upgrade support with TF-M
122 - 2 AES coprocessors including one with DPA resistance
123 - Public key accelerator, DPA resistant
124 - On-the-fly decryption of Octo-SPI external memories
125 - HASH hardware accelerator
126 - True random number generator, NIST SP800-90B compliant
127 - 96-bit unique ID
128 - 512-byte OTP (one-time programmable)
129 - Active tampers
131 - Up to 17 timers, 2 watchdogs and RTC:
133 - 19 timers: 2 16-bit advanced motor-control, 4 32-bit, 3 16-bit general
134 purpose, 2 16-bit basic, 4 low-power 16-bit (available in Stop mode),
136 - RTC with hardware calendar, alarms, and calibration
138 - Up to 25 communication peripherals:
140 - 1 USB Type-C®/USB power delivery controller
141 - 1 USB OTG high-speed with embedded PHY
142 - 2 SAIs (serial audio interface)
143 - 6 I2C FM+(1 Mbit/s), SMBus/PMBus™
144 - 7 USARTs (ISO 7816, LIN, IrDA, modem)
145 - 3 SPIs (6x SPIs with OCTOSPI/HSPI)
146 - 1 CAN FD controller
147 - 2 SDMMC interfaces
148 - 1 multifunction digital filter (6 filters) + 1 audio digital filter
149 with sound-activity detection
150 - Parallel synchronous slave interface
152 - Mathematical coprocessor:
154 - CORDIC for trigonometric functions acceleration
155 - FMAC (filter mathematical accelerator)
157 - Rich analog peripherals (independent supply):
159 - 2 14-bit ADC 2.5-Msps with hardware oversampling
160 - 1 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode
161 - 12-bit DAC (2 channels), low-power sample, and hold, autonomous in Stop 2 mode
162 - 2 operational amplifiers with built-in PGA
163 - 2 ultra-low-power comparators
165 - ECOPACK2 compliant packages
169 - `STM32U5A5ZJ on www.st.com`_
170 - `STM32U5A5 reference manual`_
177 +-----------+------------+-------------------------------------+
180 | CAN/CANFD | on-chip | canbus |
181 +-----------+------------+-------------------------------------+
182 | CLOCK | on-chip | reset and clock control |
183 +-----------+------------+-------------------------------------+
184 | DAC | on-chip | DAC Controller |
185 +-----------+------------+-------------------------------------+
186 | GPIO | on-chip | gpio |
187 +-----------+------------+-------------------------------------+
188 | I2C | on-chip | i2c |
189 +-----------+------------+-------------------------------------+
190 | NVIC | on-chip | nested vector interrupt controller |
191 +-----------+------------+-------------------------------------+
192 | PINMUX | on-chip | pinmux |
193 +-----------+------------+-------------------------------------+
194 | SPI | on-chip | spi |
195 +-----------+------------+-------------------------------------+
196 | UART | on-chip | serial port-polling; |
197 | | | serial port-interrupt |
198 +-----------+------------+-------------------------------------+
199 | WATCHDOG | on-chip | independent watchdog |
200 +-----------+------------+-------------------------------------+
201 | BKP SRAM | on-chip | Backup SRAM |
202 +-----------+------------+-------------------------------------+
203 | RNG | on-chip | True Random number generator |
204 +-----------+------------+-------------------------------------+
205 | RTC | on-chip | rtc |
206 +-----------+------------+-------------------------------------+
207 | USB | on-chip | USB 2.0 HS |
208 +-----------+------------+-------------------------------------+
221 for pin muxing, input/output, pull-up, etc.
223 For more details please refer to `STM32 Nucleo-144 board User Manual`_.
226 ----------------------------------
229 - CAN/CANFD_TX: PD1
230 - CAN/CANFD_RX: PD0
231 - DAC1_OUT1 : PA4
232 - I2C_1_SCL : PB8
233 - I2C_1_SDA : PB9
234 - I2C_2_SCL : PF1
235 - I2C_2_SDA : PF0
236 - LD1 : PC7
237 - LD2 : PB7
238 - LD3 : PG2
239 - LPUART_1_TX : PG7
240 - LPUART_1_RX : PG8
241 - SPI_1 nCS (GPIO) : PD14
242 - SPI_1_SCK : PA5
243 - SPI_1_MISO : PA6
244 - SPI_1_MOSI : PA7
245 - UART_1_TX : PA9
246 - UART_1_RX : PA10
247 - UART_2_TX : PD5
248 - UART_2_RX : PD6
249 - USER_PB : PC13
250 - USB_DM : PA11
251 - USB_DP : PA12
254 ------------
261 -----------
267 -----------
273 ---------
276 and enabled. The Nucleo U5A5ZJ-Q includes the 16MHz oscillator and required
282 Nucleo U5A5ZJ-Q board includes an ST-LINK/V3 embedded debug tool interface.
289 so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
292 the ``--runner`` (or ``-r``) option:
294 .. code-block:: console
296 $ west flash --runner openocd
297 $ west flash --runner jlink
298 $ west flash --runner pyocd
303 .. code-block:: console
305 $ pyocd pack --update
306 $ pyocd pack --install stm32u5
310 ------------------------------------------
314 :zephyr:code-sample:`hello_world` application.
318 .. code-block:: console
320 $ minicom -D /dev/ttyACM0
324 .. zephyr-app-commands::
325 :zephyr-app: samples/hello_world
331 .. code-block:: console
339 Here is an example for the :zephyr:code-sample:`blinky` application.
341 .. zephyr-app-commands::
342 :zephyr-app: samples/basic/blinky
350 .. _STM32 Nucleo-144 board User Manual:
351 …https://www.st.com/resource/en/user_manual/um2861-stm32u5-nucleo144-board-mb1549-stmicroelectronic…
357 …https://www.st.com/resource/en/reference_manual/rm0456-stm32u5-series-armbased-32bit-mcus-stmicroe…
360 https://www.st.com/en/development-tools/stm32cubeprog.html