Lines Matching +full:rs +full:- +full:485
6 SBC-3.5-PX30 (JUNO - D23) is a Single Board Computer based on embedded Rockchip PX30
7 Processor, featuring Quad-Core ARM Cortex-A35 processor. The processor
8 integrates a Mali-G31 GPU with High performance dedicated 2D processor,
11 standard (MPEG-4, H.265/HEVC, H.264, VP8, VC-1). The board is completed with up
12 to 4GB LPDDR4-3200 32-bit bus memory directly soldered on board and one eMMC
17 The audio functionalities are managed by the AudioCodec embedded in the RK-809
18 PMIC. SBC-3.5-PX30 board is completed by a series of connectors with various
24 SECO SBC-3.5-PX30 provides the following hardware components:
26 - STM32F302VCT6
27 - ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
28 - 256 KB Flash
29 - 40 KB SRAM
30 - 72 MHz max CPU frequency
31 - 2 User LEDs
32 - 16 GPI
33 - 16 GPO
34 - 4 U(S)ART
35 - Modbus
36 - RS485
37 - TTL Serial Debug
38 - TTL Serial
39 - 8-channel General Purpose Timers
40 - USB 2.0 full speed interface
41 - CAN
42 - I2C (up to 2)
43 - SPI
47 - `STM32F302VC on www.st.com`_
48 - `STM32F302xC reference manual`_
53 .. zephyr:board-supported-hw::
58 SBC-3.5-PX30 has 6 GPIO controllers. These controllers are
59 responsible for pin muxing, input/output, pull-up, etc.
61 For more details please refer to `SECO SBC-3.5-PX30 board User Manual`_.
64 ----------------------------------
66 .. rst-class:: rst-columns
68 - UART_1_TX : PA9 (debug config for UART_1)
69 - UART_1_RX : PA10 (debug config for UART_1)
70 - UART_1_TX : PC4 (alternate config for UART_1)
71 - UART_1_RX : PC5 (alternate config for UART_1)
72 - UART_2_TX : PD5
73 - UART_2_RX : PD6
74 - UART_2_CLK : PD7
75 - UART_2_CTS : PD3
76 - UART_2_RTS/DE : PD4
77 - UART_3_TX : PC10
78 - UART_3_RX : PC11
79 - UART_3_CLK : PD10
80 - UART_3_CTS : PD11
81 - UART_3_RTS/DE : PD12
82 - UART_5_TX : PC12
83 - UART_5_RX : PD2
84 - I2C1_SCL : PB6
85 - I2C1_SDA : PB7
86 - I2C2_SCL : PA9 (alternate config for UART_1)
87 - I2C2_SDA : PA10 (alternate config for UART_1)
88 - SPI1_NSS : PA4
89 - SPI1_SCK : PB3
90 - SPI1_MISO : PB4
91 - SPI1_MOSI : PB5
92 - SPI2_NSS : PB12
93 - SPI2_SCK : PB13
94 - SPI2_MISO : PB14
95 - SPI2_MOSI : PB15
96 - CAN1_RX : PB8
97 - CAN1_TX : PB9
98 - USB_DM : PA11
99 - USB_DP : PA12
100 - LD1 : PD8
101 - LD2 : PD9
102 - PWM : PA8
107 SECO SBC-3.5-PX30 System Clock could be driven by internal or external
114 SECO SBC-3.5-PX30 has up to 4 U(S)ARTs. The Zephyr console output
119 UART3 provides RS-485 interface to connectors CN57 and CN48.
126 SECO SBC-3.5-PX30 has up to 2 I2Cs. Both are present in connector CN33.
131 SECO SBC-3.5-PX30 has a USB 2.0 full-speed device interface available through
136 SECO SBC-3.5-PX30 has an onboard CAN transceiver (TJA1051T), and it is
141 SECO SBC-3.5-PX30 has two SPI lines: SPI1 is an internal SPI line connected to the
154 Flashing an application to SECO SBC-3.5-PX30
155 --------------------------------------------
157 First, connect the SECO SBC-3.5-PX30 to your host computer using
158 CN56 connector to an ST-Link.
160 The pinout is (1-8):
162 - VDD
163 - UART1_TX
164 - UART1_RX
165 - BOOT_0
166 - SWDIO_JTMS
167 - SWCLK_JTCK
168 - EC_RST#
169 - GND
173 Here is an example for the :zephyr:code-sample:`hello_world` application.
175 .. zephyr-app-commands::
176 :zephyr-app: samples/hello_world
182 .. code-block:: console
184 $ minicom -D /dev/<tty device>
186 Replace <tty_device> with the port where the SBC-3.5-PX30 board can be
191 .. code-block:: console
196 .. _SECO SBC-3.5-PX30 website:
197 https://edge.seco.com/sbc-3-5-px30.html
199 .. _SECO SBC-3.5-PX30 board User Manual:
200 https://www.seco.com/Manuals/SBC-D23_Manual.pdf
206 …ww.st.com/resource/en/reference_manual/rm0365-stm32f302xbcde-and-stm32f302x68-advanced-armbased-32…