Lines Matching +full:interrupt +full:- +full:map
5 # An external debug probe must be connected to the SWD port (4-pins J2 header).
6 # Here we assume that a ST-LINK in-circuit debugger/programmer is used. You may
10 # NXP LPC11U24 Cortex-M0 with 128KB Flash and 20KB + 4KB SRAM
17 # This ensures that the interrupt vectors (0x0000-0x0200) are re-mapped to
24 # 1:0 MAP System memory remap
25 # 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to
27 # 0x1 User RAM Mode. Interrupt vectors are re-mapped to
29 # 0x2 User Flash Mode. Interrupt vectors are not re-mapped
31 # 31:2 - - Reserved.
32 $_TARGETNAME configure -event reset-end {
37 $_TARGETNAME configure -rtos Zephyr