Lines Matching +full:0 +full:x00076000
49 gpio-map-mask = <0xffffffff 0xffffffc0>;
50 gpio-map-pass-thru = <0 0x3f>;
52 <0 0 &gpio1 9 0>, /* A0 */
53 <1 0 &gpio0 25 0>, /* A1 */
54 <2 0 &gpio0 8 0>, /* A2 */
55 <3 0 &gpio0 9 0>, /* A3 */
56 <4 0 &gpio1 13 0>, /* A4 */
57 <5 0 &gpio1 12 0>, /* A5 */
58 <6 0 &gpio1 2 0>, /* D0 */
59 <7 0 &gpio1 3 0>, /* D1 */
60 <8 0 &gpio1 4 0>, /* D2 */
61 <9 0 &gpio1 5 0>, /* D3 */
62 <10 0 &gpio1 7 0>, /* D4 */
63 <11 0 &gpio1 8 0>, /* D5 */
64 <12 0 &gpio0 17 0>, /* D6 */
65 <13 0 &gpio0 18 0>, /* D7 */
66 <14 0 &gpio0 19 0>, /* D8 */
67 <15 0 &gpio0 20 0>, /* D9 */
68 <16 0 &gpio0 21 0>, /* D10 */
69 <17 0 &gpio0 24 0>, /* D11 */
70 <18 0 &gpio0 26 0>, /* D12 */
71 <19 0 &gpio0 27 0>, /* D13 */
72 <20 0 &gpio0 28 0>, /* D14 */
73 <21 0 &gpio0 29 0>; /* D15 */
85 #clock-cells = <0>;
90 reg = <0x16000000 DT_SIZE_M(1)>;
98 * Flash area from 0x0000 to 0x2400 is reserved
104 reg = <0x000002400 0x00009c00>;
107 label = "image-0";
108 reg = <0x0000c000 0x00076000>;
112 reg = <0x00082000 0x00076000>;
116 reg = <0x000f8000 0x00008000>;
132 pinctrl-0 = <&uart_default>;
171 pinctrl-0 = <&i2c_default>;
177 pinctrl-0 = <&i2c2_default>;
183 pinctrl-0 = <&spi_controller>;
189 pinctrl-0 = <&spi2_controller>;