Lines Matching full:architecture

17 This page covers the design, architecture and rationale, of the
21 These boards use the `native simulator`_ and the :ref:`POSIX architecture<Posix arch>` to build
73 With the POSIX architecture we provided an overall
113     The :ref:`native_sim <native_sim>` board shares the :ref:`POSIX architecture<Posix arch>`,
154 The basic architecture layering of these boards is as follows:
157 - The architecture, SOC and board components of Zephyr are replaced with
159 - The architecture (arch) is the Zephyr :ref:`POSIX architecture<Posix arch>`
163 - The POSIX architecture provides an adaptation from the Zephyr arch API
166   See :ref:`POSIX arch architecture<posix_arch_architecture>`
191     Overall architecture in a Zephyr application in an embedded target vs a bsim
201 Similarly, they inherit the POSIX architecture
209 The threading description, as well as the general SOC and board architecture
211 :ref:`POSIX arch architecture<posix_arch_architecture>` and on the
215 `Architecture of HW models used for FW development and testing`_
226 :ref:`POSIX arch architecture<posix_arch_architecture>`,
247 `Architecture of HW models used for FW development and testing`_.
362 - Endianness: Code will be built for the host target architecture, which is
364   target architecture. If this is not the case, embedded code which works in one