Lines Matching +full:200 +full:ns

49 | mps2/an521/cpu0/ns   | For building Non-Secure firmware for CPU0             |
64 ignoring the S/NS alias difference.
67 | Board                   | CPU | Code (Offset)  | SRAM (Offset)  | S/NS Alias |
71 | mps2/an521/cpu0/ns      | 0   | 512KB (1MB)    | 512KB (1MB)    | NS         |
73 | mps2/an521/cpu1         | 1   | 468KB (3628KB) | 512KB (1.5MB)  | NS         |
76 The ``mps2/an521/cpu0/ns`` board target is intended to be used with TF-M, with the
95 When using one of the alternative board targets (``mps2/an521/cpu0/ns`` or
106 - Soft Macro Model (SMM) implementation of SSE-200 subsystem
214 |      |            | from ns space  |                          |
413    for MPS2+ AN521 (CPU0) using ``-DBOARD=mps2/an521/cpu0/ns``.
441    using ``-DBOARD=mps2/an521/cpu0/ns``.
464 For more details refer to `Corelink SSE-200 Subsystem`_.
567 .. _Corelink SSE-200 Subsystem:
568    https://developer.arm.com/documentation/dto0051/latest/subsystem-overview/about-the-sse-200