74 #define XTENSA_MMU_PTE_ATTR_GET(pte) \  argument
75 	((pte) & XTENSA_MMU_PTE_ATTR_MASK)
78 #define XTENSA_MMU_PTE_ATTR_SET(pte, attr) \  argument
79 	(((pte) & ~XTENSA_MMU_PTE_ATTR_MASK) | (attr & XTENSA_MMU_PTE_ATTR_MASK))
82 #define XTENSA_MMU_PTE_SW_SET(pte, sw) \  argument
83 	(((pte) & ~XTENSA_MMU_PTE_SW_MASK) | (sw << XTENSA_MMU_PTE_SW_SHIFT))
86 #define XTENSA_MMU_PTE_SW_GET(pte) \  argument
87 	(((pte) & XTENSA_MMU_PTE_SW_MASK) >> XTENSA_MMU_PTE_SW_SHIFT)
90 #define XTENSA_MMU_PTE_RING_SET(pte, ring) \  argument
91 	(((pte) & ~XTENSA_MMU_PTE_RING_MASK) | \
95 #define XTENSA_MMU_PTE_RING_GET(pte) \  argument
96 	(((pte) & XTENSA_MMU_PTE_RING_MASK) >> XTENSA_MMU_PTE_RING_SHIFT)
99 #define XTENSA_MMU_PTE_ASID_GET(pte, rasid) \  argument
100 	(((rasid) >> ((((pte) & XTENSA_MMU_PTE_RING_MASK) \
293 static ALWAYS_INLINE void xtensa_dtlb_entry_write_sync(uint32_t pte, uint32_t entry)  in xtensa_dtlb_entry_write_sync()  argument
297 			: : "a" (pte), "a"(entry));  in xtensa_dtlb_entry_write_sync()
306 static ALWAYS_INLINE void xtensa_dtlb_entry_write(uint32_t pte, uint32_t entry)  in xtensa_dtlb_entry_write()  argument
309 			: : "a" (pte), "a"(entry));  in xtensa_dtlb_entry_write()
318 static ALWAYS_INLINE void xtensa_itlb_entry_write(uint32_t pte, uint32_t entry)  in xtensa_itlb_entry_write()  argument
321 			: : "a" (pte), "a"(entry));  in xtensa_itlb_entry_write()
330 static ALWAYS_INLINE void xtensa_itlb_entry_write_sync(uint32_t pte, uint32_t entry)  in xtensa_itlb_entry_write_sync()  argument
334 			: : "a" (pte), "a"(entry));  in xtensa_itlb_entry_write_sync()