74 #define XTENSA_MMU_PTE_ATTR_GET(pte) \  argument
78 #define XTENSA_MMU_PTE_ATTR_SET(pte, attr) \  argument
82 #define XTENSA_MMU_PTE_SW_SET(pte, sw) \  argument
86 #define XTENSA_MMU_PTE_SW_GET(pte) \  argument
90 #define XTENSA_MMU_PTE_RING_SET(pte, ring) \  argument
95 #define XTENSA_MMU_PTE_RING_GET(pte) \  argument
99 #define XTENSA_MMU_PTE_ASID_GET(pte, rasid) \  argument
293 static ALWAYS_INLINE void xtensa_dtlb_entry_write_sync(uint32_t pte, uint32_t entry)  in xtensa_dtlb_entry_write_sync()
306 static ALWAYS_INLINE void xtensa_dtlb_entry_write(uint32_t pte, uint32_t entry)  in xtensa_dtlb_entry_write()
318 static ALWAYS_INLINE void xtensa_itlb_entry_write(uint32_t pte, uint32_t entry)  in xtensa_itlb_entry_write()
330 static ALWAYS_INLINE void xtensa_itlb_entry_write_sync(uint32_t pte, uint32_t entry)  in xtensa_itlb_entry_write_sync()