28 static void compute_regs(uint32_t user_asid, uint32_t *l1_page, struct tlb_regs *regs)  in compute_regs()  argument
37 	regs->rasid = (XTENSA_MMU_SHARED_ASID << 24) |  in compute_regs()
41 	regs->ptevaddr = CONFIG_XTENSA_MMU_PTEVADDR + user_asid * 0x400000;  in compute_regs()
44 	l1_page[XTENSA_MMU_L1_POS(regs->ptevaddr)] =  in compute_regs()
47 	regs->ptepin_at = (uint32_t)l1_page;  in compute_regs()
48 	regs->ptepin_as = XTENSA_MMU_PTE_ENTRY_VADDR(regs->ptevaddr, regs->ptevaddr)  in compute_regs()
61 	regs->vecpin_at = vb_pte;  in compute_regs()
62 	regs->vecpin_as = XTENSA_MMU_PTE_ENTRY_VADDR(regs->ptevaddr, vecbase)  in compute_regs()
89 	struct tlb_regs regs;  in xtensa_set_paging()  local
91 	compute_regs(user_asid, l1_page, &regs);  in xtensa_set_paging()
101 			 :: "r"(regs.ptevaddr), "r"(regs.rasid),  in xtensa_set_paging()
102 			    "r"(regs.ptepin_at), "r"(regs.ptepin_as),  in xtensa_set_paging()
103 			    "r"(regs.vecpin_at), "r"(regs.vecpin_as));  in xtensa_set_paging()
127 	struct tlb_regs regs;  in xtensa_init_paging()  local
149 	compute_regs(ASID_INVALID, l1_page, &regs);  in xtensa_init_paging()
151 	uint32_t idtlb_pte = (regs.ptevaddr & 0xe0000000) | XCHAL_SPANNING_WAY;  in xtensa_init_paging()
152 	uint32_t idtlb_stk = (((uint32_t)&regs) & ~0xfff) | XCHAL_SPANNING_WAY;  in xtensa_init_paging()
174 			 :: "r"(regs.ptevaddr), "r"(initial_rasid),  in xtensa_init_paging()
175 			    "r"(regs.ptepin_at), "r"(regs.ptepin_as),  in xtensa_init_paging()
176 			    "r"(regs.vecpin_at), "r"(regs.vecpin_as),  in xtensa_init_paging()