Lines Matching +full:fill +full:- +full:level

4  * SPDX-License-Identifier: Apache-2.0
118 * which is 0-255. in read_sreg()
120 regno = reg->regno & 0xFF; in read_sreg()
125 * hard-coded at compile time. in read_sreg()
323 reg->val = val; in read_sreg()
324 reg->seqno = ctx->seqno; in read_sreg()
432 if ((int *)bsa - stack > 4) { in copy_to_ctx()
434 } else if ((int *)bsa - stack > 8) { in copy_to_ctx()
436 } else if ((int *)bsa - stack > 12) { in copy_to_ctx()
442 /* Get logical address registers A0 - A<num_laddr_regs> from stack */ in copy_to_ctx()
446 if (reg->regno == SOC_GDB_REGNO_A1) { in copy_to_ctx()
448 reg->val = POINTER_TO_UINT( in copy_to_ctx()
450 reg->seqno = ctx->seqno; in copy_to_ctx()
452 reg->val = bsa[reg->stack_offset / 4]; in copy_to_ctx()
453 reg->seqno = ctx->seqno; in copy_to_ctx()
464 } else if (reg->stack_offset != 0) { in copy_to_ctx()
466 reg->val = bsa[reg->stack_offset / 4]; in copy_to_ctx()
467 reg->seqno = ctx->seqno; in copy_to_ctx()
479 * Copied the logical registers A0-A15 to physical registers (AR*) in copy_to_ctx()
490 /* Wrap around A64 (or A32) -> A0 */ in copy_to_ctx()
523 if ((int *)bsa - stack > 4) { in restore_from_ctx()
525 } else if ((int *)bsa - stack > 8) { in restore_from_ctx()
527 } else if ((int *)bsa - stack > 12) { in restore_from_ctx()
535 * windowed registers. GDB manipulates A0-A15 directly in restore_from_ctx()
540 * Push values of logical address registers A0 - A<num_laddr_regs> in restore_from_ctx()
546 if (reg->regno == SOC_GDB_REGNO_A1) { in restore_from_ctx()
550 bsa[reg->stack_offset / 4] = reg->val; in restore_from_ctx()
560 } else if (reg->stack_offset != 0) { in restore_from_ctx()
562 bsa[reg->stack_offset / 4] = reg->val; in restore_from_ctx()
574 * Need to go past the BREAK.N instruction (16-bit) in restore_from_ctx()
580 bsa->pc += 2; in restore_from_ctx()
613 uint8_t *bin = (uint8_t *)&reg->val; in reg2hex()
614 size_t binlen = reg->byte_size; in reg2hex()
641 * Fill with 'x' to mark them as available since most registers in arch_gdb_reg_readall()
647 for (idx = 0; idx < ctx->num_regs; idx++) { in arch_gdb_reg_readall()
648 reg = &ctx->regs[idx]; in arch_gdb_reg_readall()
650 if (reg->seqno != ctx->seqno) { in arch_gdb_reg_readall()
659 if ((reg->gpkt_offset < 0) || in arch_gdb_reg_readall()
660 (reg->gpkt_offset >= SOC_GDB_GPKT_BIN_SIZE)) { in arch_gdb_reg_readall()
662 * Register is not in G-packet, or in arch_gdb_reg_readall()
663 * beyond maximum size of G-packet. in arch_gdb_reg_readall()
665 * xtensa-config.c may specify G-packet in arch_gdb_reg_readall()
674 output = &buf[reg->gpkt_offset * 2]; in arch_gdb_reg_readall()
690 * GDB on Xtensa does not seem to use G-packet to write register in arch_gdb_reg_writeall()
709 for (idx = 0; idx < ctx->num_regs; idx++) { in arch_gdb_reg_readone()
710 reg = &ctx->regs[idx]; in arch_gdb_reg_readone()
713 * GDB sends the G-packet index as register number in arch_gdb_reg_readone()
716 if (reg->idx == regno) { in arch_gdb_reg_readone()
717 if (reg->seqno != ctx->seqno) { in arch_gdb_reg_readone()
739 if (buflen < (reg->byte_size * 2)) { in arch_gdb_reg_readone()
761 for (idx = 0; idx < ctx->num_regs; idx++) { in arch_gdb_reg_writeone()
762 reg = &ctx->regs[idx]; in arch_gdb_reg_writeone()
769 if (reg->idx != regno) { in arch_gdb_reg_writeone()
773 if (hexlen < (reg->byte_size * 2)) { in arch_gdb_reg_writeone()
774 /* Not enough hex digits to fill the register */ in arch_gdb_reg_writeone()
778 /* Register value is now up-to-date */ in arch_gdb_reg_writeone()
779 reg->seqno = ctx->seqno; in arch_gdb_reg_writeone()
783 (uint8_t *)&reg->val, reg->byte_size); in arch_gdb_reg_writeone()
811 ret = -1; in arch_gdb_add_breakpoint()
825 ret = -1; in arch_gdb_add_breakpoint()
838 ret = -2; in arch_gdb_add_breakpoint()
864 ret = -1; in arch_gdb_remove_breakpoint()
875 ret = -1; in arch_gdb_remove_breakpoint()
894 ret = -1; in arch_gdb_remove_breakpoint()
908 ret = -2; in arch_gdb_remove_breakpoint()
969 * The interrupt enable bits for higher level interrupts in arch_gdb_init()
970 * (level 2+) sit just after the level-1 interrupts. in arch_gdb_init()
972 * after level-1 interrupts is for level-2 interrupt. in arch_gdb_init()
975 xtensa_irq_enable(XCHAL_NUM_EXTINTERRUPTS + XCHAL_DEBUGLEVEL - 2); in arch_gdb_init()