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3 There is a paucity of introductory material on this subject, and
9 When register windows are configured in the CPU, there are either 32
11 Registers are grouped and rotated in units of 4, so there are 8 or 16
20 There is a ROTW instruction that can be used to manually rotate the
26 There are CALL4/CALL8/CALL12 instructions to effect rotated calls
33 There is an ENTRY instruction that does the rotation.  It adds CALLINC
38 There is a RETW instruction that undoes the rotation.  It reads the
48 wrapped around and needs to be spilled or filled.  To do this there is
55 stay zero.  So there is one set bit in WINDOWSTART corresponding to
66 another call by seeing if there is a one in WINDOWSTART between that
67 register's quad and WINDOWBASE.  If there is, the CPU traps to a spill
75 frame.  So there are six separate exception handlers to spill/fill
106 There is no spill area for A12-A15.  Those registers are always