Lines Matching +full:lock +full:- +full:regions

4 # SPDX-License-Identifier: Apache-2.0
32 	  the core-isa.h file.  This replaces the previous scheme
62 	  A design trick on multi-core hardware is to map memory twice
71 	  This specifies which 512M region (0-7, as defined by the Xtensa
79 	  region (0-7) contains the "uncached" mapping.
94 	  NOPs after failure to lock a spinlock. This gives
161 	bool "Xtensa exceptions and interrupts cannot be pre-empted"
164 	  pre-empting low priority interrupts and exceptions.
263 	  Default memory type for memory regions: non-cacheable memory,
264 	  non-shareable, non-bufferable and interruptible.
283 	default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "xt-clang"