Lines Matching +full:20 +full:- +full:bit
3 * SPDX-License-Identifier: Apache-2.0
10 * Exception/interrupt vector definitions: vectors 20 to 31 are reserved
34 #define IV_VIRT_EXCEPTION 20
41 * EFLAGS/RFLAGS definitions. (RFLAGS is just zero-extended EFLAGS.)
44 #define EFLAGS_IF BIT(9) /* interrupts enabled */
45 #define EFLAGS_DF BIT(10) /* Direction flag */
53 #define CR0_PG BIT(31) /* enable paging */
54 #define CR0_WP BIT(16) /* honor W bit even when supervisor */
56 #define CR4_PSE BIT(4) /* Page size extension (4MB pages) */
57 #define CR4_PAE BIT(5) /* enable PAE */
58 #define CR4_OSFXSR BIT(9) /* enable SSE (OS FXSAVE/RSTOR) */