Lines Matching refs:mask

82 	pentry_t mask;  member
123 .mask = 0x7FFFFFFFFFFFF000ULL,
134 .mask = 0x7FFFFFFFFFFFF000ULL,
150 .mask = 0x7FFFFFFFFFFFF000ULL,
155 .mask = 0xFFFFF000U,
166 .mask = 0x07FFFFFFFFFFF000ULL,
171 .mask = 0xFFFFF000U,
309 return entry & paging_levels[level].mask; in get_entry_phys()
759 virtmap, entry & info->mask, buf); in dump_entry()
1005 pentry_t *old_val_ptr, pentry_t mask, uint32_t options) in page_map_set() argument
1021 mask, options); in page_map_set()
1096 size_t size, pentry_t entry_flags, pentry_t mask, in range_map_ptables() argument
1107 CHECKIF(!((entry_flags & paging_levels[0].mask) == 0U)) { in range_map_ptables()
1128 ret2 = page_map_set(ptables, dest_virt, entry_val, NULL, mask, in range_map_ptables()
1168 pentry_t entry_flags, pentry_t mask, uint32_t options) in range_map() argument
1174 entry_flags, mask, options); in range_map()
1207 entry_flags, mask, in range_map()
1217 entry_flags, mask, options); in range_map()
1235 pentry_t entry_flags, pentry_t mask, in range_map_unlocked() argument
1242 ret = range_map(virt, phys, size, entry_flags, mask, options); in range_map_unlocked()
2091 #define PTE_MASK (paging_levels[PTE_LEVEL].mask)
2097 pentry_t mask = PTE_MASK | MMU_P | MMU_A; in arch_mem_page_out() local
2102 ret = range_map(addr, location, CONFIG_MMU_PAGE_SIZE, MMU_A, mask, in arch_mem_page_out()
2112 pentry_t mask = PTE_MASK | MMU_P | MMU_D | MMU_A; in arch_mem_page_in() local
2114 ret = range_map(addr, phys, CONFIG_MMU_PAGE_SIZE, MMU_P, mask, in arch_mem_page_in()
2131 pentry_t all_pte, mask; in arch_page_info_get() local
2136 mask = MMU_A; in arch_page_info_get()
2142 mask = 0; in arch_page_info_get()
2146 page_map_set(z_x86_kernel_ptables, addr, 0, &all_pte, mask, options); in arch_page_info_get()
2171 mask, options | OPTION_USER); in arch_page_info_get()