Lines Matching refs:t2
29 RV_E( op t2, __struct_arch_esf_t2_OFFSET(sp) );\
206 csrr t2, mstatus
207 sr t2, __struct_arch_esf_mstatus_OFFSET(sp)
212 and t1, t1, t2
215 csrr t2, mcause
217 and t2, t2, t1
219 bne t1, t2, no_fp
221 csrr t2, mtval /* get faulting instruction */
227 bnez t2, 1f
228 lw t2, 0(t0) /* t0 = mepc */
231 andi t0, t2, 0x7f /* keep only the opcode bits */
261 srli t0, t2, 12
264 srli t0, t2, 20 /* isolate the csr register number */
272 andi t1, t2, 1
286 srli t0, t2, 8
343 li t2, CONFIG_RISCV_MCAUSE_EXCEPTION_MASK
344 and t0, t0, t2
491 addi t2, t1, 1
492 sw t2, ___cpu_t_nested_OFFSET(s0)
560 la t2, _k_syscall_table
563 add t2, t2, t1 # Table addr + offset = function addr
564 lr t2, 0(t2) # Load function address
567 jalr ra, t2, 0
607 addi t2, t1, 1
608 sw t2, ___cpu_t_nested_OFFSET(s0)
668 lw t2, ___cpu_t_nested_OFFSET(s0)
669 addi t2, t2, -1
670 sw t2, ___cpu_t_nested_OFFSET(s0)
671 bnez t2, no_reschedule
739 lr t2, __struct_arch_esf_mstatus_OFFSET(sp)
741 csrw mstatus, t2
750 and t0, t2, t1