Lines Matching full:t1
28 RV_E( op t1, __struct_arch_esf_t1_OFFSET(sp) );\
143 /* preserve t0 and t1 temporarily */
145 sr t1, _curr_cpu_arch_user_exc_tmp1(s0)
149 li t1, MSTATUS_MPP
150 and t0, t0, t1
181 /* retrieve original t0/t1 values */
183 lr t1, _curr_cpu_arch_user_exc_tmp1(s0)
211 li t1, MSTATUS_FS
212 and t1, t1, t2
213 bnez t1, no_fp
216 li t1, CONFIG_RISCV_MCAUSE_EXCEPTION_MASK
217 and t2, t2, t1
218 li t1, 2 /* 2 = illegal instruction */
219 bne t1, t2, no_fp
242 xori t1, t0, 0b1010011 /* OP-FP */
243 beqz t1, is_fp
244 ori t1, t0, 0b0100000
245 xori t1, t1, 0b0100111 /* LOAD-FP / STORE-FP */
246 beqz t1, is_fp
247 ori t1, t0, 0b0001100
248 xori t1, t1, 0b1001111 /* MADD / MSUB / NMSUB / NMADD */
249 beqz t1, is_fp
259 xori t1, t0, 0b1110011 /* SYSTEM opcode */
260 bnez t1, 2f /* not a CSR insn */
272 andi t1, t2, 1
273 bnez t1, no_fp
288 andi t1, t0, 0b01100000
289 xori t1, t1, 0b00100000
290 bnez t1, no_fp
292 andi t1, t0, 0b00100000
293 beqz t1, no_fp
304 lb t1, _thread_offset_to_exception_depth(t0)
305 add t1, t1, 1
306 sb t1, _thread_offset_to_exception_depth(t0)
350 li t1, RISCV_EXC_ECALLM
351 beq t0, t1, is_kernel_syscall
358 li t1, RISCV_EXC_ECALLU
359 beq t0, t1, is_user_syscall
367 li t1, MSTATUS_MPP
368 and t0, t0, t1
404 li t1, MSTATUS_MPP
405 csrc mstatus, t1
406 li t1, MSTATUS_MPRV
407 csrs mstatus, t1
417 li t1, RV_ECALL_IRQ_OFFLOAD
418 beq t0, t1, do_irq_offload
422 li t1, RV_ECALL_SCHEDULE
423 bne t0, t1, skip_schedule
433 lb t1, _thread_offset_to_exception_depth(a0)
434 add t1, t1, -1
435 sb t1, _thread_offset_to_exception_depth(a0)
437 lb t1, _thread_offset_to_exception_depth(a1)
438 add t1, t1, 1
439 sb t1, _thread_offset_to_exception_depth(a1)
490 lw t1, ___cpu_t_nested_OFFSET(s0)
491 addi t2, t1, 1
493 bnez t1, 1f
529 lr t1, __struct_arch_esf_mepc_OFFSET(sp)
530 addi t1, t1, 4
531 sr t1, __struct_arch_esf_mepc_OFFSET(sp)
544 mv t1, sp
545 sw t1, 0(sp)
551 li t1, K_SYSCALL_LIMIT
552 bltu t0, t1, valid_syscall_id
562 slli t1, t0, RV_REGSHIFT # Determine offset from indice value
563 add t2, t2, t1 # Table addr + offset = function addr
590 li t1, MSTATUS_MPP
591 and t0, t0, t1
598 li t1, MSTATUS_MPP
599 csrc mstatus, t1
600 li t1, MSTATUS_MPRV
601 csrs mstatus, t1
606 lw t1, ___cpu_t_nested_OFFSET(s0)
607 addi t2, t1, 1
609 bnez t1, on_irq_stack
654 /* Load ISR function address in register t1 */
655 lr t1, RV_REGSIZE(t0)
658 jalr ra, t1, 0
731 lb t1, _thread_offset_to_exception_depth(t0)
732 add t1, t1, -1
733 sb t1, _thread_offset_to_exception_depth(t0)
749 li t1, MSTATUS_MPP
750 and t0, t2, t1
760 li t1, 1
763 sb t1, %tprel_lo(is_user_mode)(t0)