Lines Matching refs:x0
44 switch_el x0, 3f, 2f, 1f
49 msr sctlr_el3, x0
62 mrs x0, sctlr_el2
63 bic x0, x0, SCTLR_A_BIT
64 msr sctlr_el2, x0
76 mrs x0, sctlr_el1
77 bic x0, x0, SCTLR_A_BIT
78 msr sctlr_el1, x0
133 ldr x0, =arm64_cpu_boot_params
141 add x4, x0, #BOOT_PARAM_VOTING_OFFSET
146 ldr x3, [x0, #BOOT_PARAM_MPID_OFFSET]
155 1: str x1, [x0, #BOOT_PARAM_MPID_OFFSET]
172 ldr x3, [x0, #BOOT_PARAM_MPID_OFFSET]
180 ldr x2, [x0, #BOOT_PARAM_MPID_OFFSET]
185 ldr x24, [x0, #BOOT_PARAM_SP_OFFSET]
204 mov_imm x0, CONFIG_ISR_STACK_SIZE
205 sub x0, sp, x0
209 cmp x0, x9
211 str x10, [x0], #8
220 switch_el x0, 3f, 2f, 1f
228 adr x0, switch_el
238 mov_imm x0, (SPSR_DAIF_MASK | SPSR_MODE_EL1T)
239 msr spsr_el2, x0
241 adr x0, 1f
242 msr elr_el2, x0