52 			MMU_DEBUG("allocating table [%d]%p\n", i, table);  in new_table()
78 		MMU_DEBUG("table [%d]%p: usage %#x -> %#x\n", i, table, prev_count, new_count);  in table_usage()
178 		MMU_DEBUG("misaligned desc 0x%016llx for block size 0x%x\n",  in is_desc_block_aligned()
196 	MMU_DEBUG("%.*s", level * 2U, ". . . ");  in debug_show_pte()
197 	MMU_DEBUG("[%d]%p: ", table_index(pte), pte);  in debug_show_pte()
200 		MMU_DEBUG("---\n");  in debug_show_pte()
204 	MMU_DEBUG("0x%016llx ", *pte);  in debug_show_pte()
209 		MMU_DEBUG("[Table] [%d]%p\n", table_index(table), table);  in debug_show_pte()
214 		MMU_DEBUG("[Block] ");  in debug_show_pte()
216 		MMU_DEBUG("[Page] ");  in debug_show_pte()
218 		MMU_DEBUG("[paged-out] ");  in debug_show_pte()
223 	MMU_DEBUG((mem_type == MT_NORMAL) ? "MEM" :  in debug_show_pte()
225 	MMU_DEBUG((*pte & PTE_BLOCK_DESC_AP_RO) ? "-RO" : "-RW");  in debug_show_pte()
226 	MMU_DEBUG((*pte & PTE_BLOCK_DESC_NS) ? "-NS" : "-S");  in debug_show_pte()
227 	MMU_DEBUG((*pte & PTE_BLOCK_DESC_AP_ELx) ? "-ELx" : "-ELh");  in debug_show_pte()
228 	MMU_DEBUG((*pte & PTE_BLOCK_DESC_PXN) ? "-PXN" : "-PX");  in debug_show_pte()
229 	MMU_DEBUG((*pte & PTE_BLOCK_DESC_UXN) ? "-UXN" : "-UX");  in debug_show_pte()
230 	MMU_DEBUG((*pte & PTE_SW_WRITABLE) ? "-WRITABLE" : "");  in debug_show_pte()
231 	MMU_DEBUG("\n");  in debug_show_pte()
279 		MMU_DEBUG("expanding PTE 0x%016llx into table [%d]%p\n",  in expand_to_table()
426 	MMU_DEBUG("dup (level %d) [%d]%p to [%d]%p\n", level,  in dup_table()
514 	MMU_DEBUG("privatize [%s]: virt %lx size %lx\n",  in privatize_page_range()
643 	MMU_DEBUG("globalize [%s]: virt %lx size %lx\n",  in globalize_page_range()
744 	MMU_DEBUG("mmap [%s]: virt %lx phys %lx size %lx attr %llx %s overwrite\n",  in __add_map()
770 	MMU_DEBUG("unmmap [%s]: virt %lx size %lx\n", name, virt, size);  in remove_map()
880 	MMU_DEBUG("xlat tables:\n");  in setup_page_tables()
882 		MMU_DEBUG("%d: %p\n", index, xlat_tables + index * Ln_XLAT_NUM_ENTRIES);  in setup_page_tables()
981 	MMU_DEBUG("MMU enabled with dcache\n");  in enable_mmu_el1()
1210 	MMU_DEBUG("%s\n", __func__);  in arch_mem_domain_init()
1359 	MMU_DEBUG("TTBR0 switch from %#llx to %#llx\n", curr_ttbr0, new_ttbr0);  in z_arm64_swap_ptables()
1441 	MMU_DEBUG("page_out: virt=%#lx location=%#lx\n", virt, location);  in arch_mem_page_out()
1475 	MMU_DEBUG("page_in: virt=%#lx phys=%#lx\n", virt, phys);  in arch_mem_page_in()
1557 		MMU_DEBUG("page_info: virt=%#lx (clearing AF)\n", virt);  in arch_page_info_get()