Lines Matching full:desc
143 static inline bool is_free_desc(uint64_t desc) in is_free_desc() argument
145 return desc == 0; in is_free_desc()
148 static inline bool is_inval_desc(uint64_t desc) in is_inval_desc() argument
151 return (desc & PTE_DESC_TYPE_MASK) == PTE_INVALID_DESC; in is_inval_desc()
154 static inline bool is_table_desc(uint64_t desc, unsigned int level) in is_table_desc() argument
157 (desc & PTE_DESC_TYPE_MASK) == PTE_TABLE_DESC; in is_table_desc()
160 static inline bool is_block_desc(uint64_t desc) in is_block_desc() argument
162 return (desc & PTE_DESC_TYPE_MASK) == PTE_BLOCK_DESC; in is_block_desc()
165 static inline uint64_t *pte_desc_table(uint64_t desc) in pte_desc_table() argument
167 uint64_t address = desc & PTE_PHYSADDR_MASK; in pte_desc_table()
173 static inline bool is_desc_block_aligned(uint64_t desc, unsigned int level_size) in is_desc_block_aligned() argument
175 bool aligned = (desc & PTE_PHYSADDR_MASK & (level_size - 1)) == 0; in is_desc_block_aligned()
178 MMU_DEBUG("misaligned desc 0x%016llx for block size 0x%x\n", in is_desc_block_aligned()
179 desc, level_size); in is_desc_block_aligned()
244 static void set_pte_block_desc(uint64_t *pte, uint64_t desc, unsigned int level) in set_pte_block_desc() argument
247 desc |= PTE_BLOCK_DESC; in set_pte_block_desc()
248 } else if (!IS_ENABLED(CONFIG_DEMAND_PAGING) || (desc & PTE_BLOCK_DESC_AF) != 0) { in set_pte_block_desc()
249 desc |= PTE_PAGE_DESC; in set_pte_block_desc()
256 *pte = desc; in set_pte_block_desc()
276 uint64_t desc = *pte; in expand_to_table() local
280 desc, table_index(table), table); in expand_to_table()
281 __ASSERT(is_block_desc(desc), ""); in expand_to_table()
284 desc |= PTE_PAGE_DESC; in expand_to_table()
289 table[i] = desc | (i << stride_shift); in expand_to_table()
307 uint64_t desc, bool may_overwrite) in set_mapping() argument
338 if (is_desc_superset(*pte, desc, level)) { in set_mapping()
348 !is_desc_block_aligned(desc, level_size)) { in set_mapping()
363 set_pte_block_desc(pte, desc, level); in set_mapping()
367 desc += level_size; in set_mapping()
660 uint64_t desc = 0U; in get_region_desc() local
663 desc |= (attrs & MT_NS) ? PTE_BLOCK_DESC_NS : 0; in get_region_desc()
677 desc |= (attrs & MT_RW) ? PTE_BLOCK_DESC_AP_RW : PTE_BLOCK_DESC_AP_RO; in get_region_desc()
678 desc |= (IS_ENABLED(CONFIG_DEMAND_PAGING) && (attrs & MT_RW)) ? in get_region_desc()
682 desc |= (attrs & MT_RW_AP_ELx) ? in get_region_desc()
686 desc |= PTE_BLOCK_DESC_AF; in get_region_desc()
689 desc &= ~PTE_BLOCK_DESC_AF; in get_region_desc()
690 desc |= PTE_BLOCK_DESC_AP_RO; in get_region_desc()
695 desc |= PTE_BLOCK_DESC_MEMTYPE(mem_type); in get_region_desc()
706 desc |= PTE_BLOCK_DESC_OUTER_SHARE; in get_region_desc()
708 desc |= PTE_BLOCK_DESC_PXN; in get_region_desc()
709 desc |= PTE_BLOCK_DESC_UXN; in get_region_desc()
715 desc |= PTE_BLOCK_DESC_PXN; in get_region_desc()
720 desc |= PTE_BLOCK_DESC_UXN; in get_region_desc()
724 desc |= PTE_BLOCK_DESC_INNER_SHARE; in get_region_desc()
726 desc |= PTE_BLOCK_DESC_OUTER_SHARE; in get_region_desc()
732 desc |= PTE_BLOCK_DESC_NG; in get_region_desc()
735 return desc; in get_region_desc()
741 uint64_t desc = get_region_desc(attrs); in __add_map() local
745 name, virt, phys, size, desc, in __add_map()
749 desc |= phys; in __add_map()
750 return set_mapping(ptables->base_xlat_table, virt, size, desc, may_overwrite); in __add_map()
1420 uint64_t desc; in arch_mem_page_out() local
1423 desc = *pte; in arch_mem_page_out()
1426 desc &= ~PTE_DESC_TYPE_MASK; in arch_mem_page_out()
1427 desc |= PTE_INVALID_DESC; in arch_mem_page_out()
1431 desc &= ~PTE_PHYSADDR_MASK; in arch_mem_page_out()
1432 desc |= location; in arch_mem_page_out()
1438 desc |= PTE_BLOCK_DESC_AP_RO; in arch_mem_page_out()
1440 *pte = desc; in arch_mem_page_out()
1452 uint64_t desc; in arch_mem_page_in() local
1457 desc = *pte; in arch_mem_page_in()
1458 __ASSERT(!is_free_desc(desc), ""); in arch_mem_page_in()
1461 desc &= ~PTE_DESC_TYPE_MASK; in arch_mem_page_in()
1462 desc |= PTE_PAGE_DESC; in arch_mem_page_in()
1465 desc &= ~PTE_PHYSADDR_MASK; in arch_mem_page_in()
1466 desc |= phys; in arch_mem_page_in()
1469 desc |= PTE_BLOCK_DESC_AP_RO; in arch_mem_page_in()
1472 desc &= ~PTE_BLOCK_DESC_AF; in arch_mem_page_in()
1474 *pte = desc; in arch_mem_page_in()
1486 uint64_t desc; in arch_page_location_get() local
1492 desc = *pte; in arch_page_location_get()
1493 if (is_free_desc(desc)) { in arch_page_location_get()
1497 switch (desc & PTE_DESC_TYPE_MASK) { in arch_page_location_get()
1508 *location = desc & PTE_PHYSADDR_MASK; in arch_page_location_get()
1516 uint64_t desc; in arch_page_info_get() local
1522 desc = *pte; in arch_page_info_get()
1523 if (is_free_desc(desc)) { in arch_page_info_get()
1527 switch (desc & PTE_DESC_TYPE_MASK) { in arch_page_info_get()
1539 *phys = desc & PTE_PHYSADDR_MASK; in arch_page_info_get()
1546 if ((desc & PTE_BLOCK_DESC_AF) != 0) { in arch_page_info_get()
1550 if ((desc & PTE_BLOCK_DESC_AP_RO) == 0) { in arch_page_info_get()
1555 desc &= ~PTE_BLOCK_DESC_AF; in arch_page_info_get()
1556 *pte = desc; in arch_page_info_get()
1602 uint64_t *pte, desc; in z_arm64_do_demand_paging() local
1628 desc = *pte; in z_arm64_do_demand_paging()
1629 if ((desc & PTE_DESC_TYPE_MASK) != PTE_PAGE_DESC) { in z_arm64_do_demand_paging()
1653 (desc & PTE_BLOCK_DESC_AF) == 0) { in z_arm64_do_demand_paging()
1655 desc |= PTE_BLOCK_DESC_AF; in z_arm64_do_demand_paging()
1657 if ((desc & PTE_SW_WRITABLE) == 0) { in z_arm64_do_demand_paging()
1666 desc &= ~PTE_BLOCK_DESC_AP_RO; in z_arm64_do_demand_paging()
1668 *pte = desc; in z_arm64_do_demand_paging()
1673 phys = desc & PTE_PHYSADDR_MASK; in z_arm64_do_demand_paging()
1679 (desc & PTE_BLOCK_DESC_AP_RO) != 0 && in z_arm64_do_demand_paging()
1680 (desc & PTE_SW_WRITABLE) != 0) { in z_arm64_do_demand_paging()
1682 desc &= ~PTE_BLOCK_DESC_AP_RO; in z_arm64_do_demand_paging()
1683 *pte = desc; in z_arm64_do_demand_paging()
1688 phys = desc & PTE_PHYSADDR_MASK; in z_arm64_do_demand_paging()