Lines Matching +full:is +full:- +full:32 +full:bit

4 # SPDX-License-Identifier: Apache-2.0
18 	  This option signifies the use of a CPU of the Cortex-A family.
31 	  This option signifies the use of a CPU of the Cortex-R 64-bit family.
38 	  This option signifies the use of a Cortex-A53 CPU
45 	  This option signifies the use of a Cortex-A55 CPU
52 	  This option signifies the use of a Cortex-A57 CPU
59 	  This option signifies the use of a Cortex-A72 CPU
66 	  This option signifies the use of a Cortex-A76 CPU
73 	  This option signifies the use of a Cortex-A76 and A55 big little CPU cluster
80 	  This option signifies the use of a Cortex-R82 CPU
123 	  and understood by loaders such as u-boot on Xen xl tool.
141 	  The safe exception stack is used for checking whether the kernel stack
142 	  overflows during the exception happens from EL1. This stack is not
154 	  and OMIT_FRAME_POINTER. It is automatically enabled when the frame
155 	  pointer unwinding is enabled.
169 	  Internal config to indicate that the arch_stack_walk() API is implemented
185 	  become reserved.  If there is an issue powering on a core during boot
197 	  the bounds of the current process stack are overflowed. This is done
203 	bool "ARMv8-A Normal World (Non-Secure world of Trustzone)"
205 	  This option signifies that Zephyr is entered in TrustZone
206 	  Non-Secure state
215 	  This option signifies the use of an ARMv8-A processor
218 	  From https://developer.arm.com/products/architecture/cpu-architecture/a-profile:
219 	  The Armv8-A architecture introduces the ability to use 64-bit and
220 	  32-bit Execution states, known as AArch64 and AArch32 respectively.
222 	  addresses in 64-bit registers and allows instructions in the base
223 	  instruction set to use 64-bit registers for their processing. The AArch32
224 	  Execution state is a 32-bit Execution state that preserves backwards
225 	  compatibility with the Armv7-A architecture and enhances that profile
241 	  This option signifies the use of an ARMv8-R processor
244 	  From https://developer.arm.com/products/architecture/cpu-architecture/r-profile:
245 	  The Armv8-R architecture targets at the Real-time profile. It introduces
280 	  This is the value returned by EL1 reads of MPIDR_EL1.
294 	  space sizes. The level of translation table is determined by
298 	bool "32-bit"
301 	bool "36-bit"
304 	bool "40-bit"
307 	bool "42-bit"
310 	bool "48-bit"
315 	default 32 if ARM64_VA_BITS_32
329 	bool "32-bit"
332 	bool "36-bit"
335 	bool "40-bit"
338 	bool "42-bit"
341 	bool "48-bit"
346 	default 32 if ARM64_PA_BITS_32
363 	  translation tables required is decided based on how many discrete
365 	  platform and how much granularity is required while assigning