20     def __init__(self, debug = False):  argument
21         self.__debug = debug
23     def debug(self, text):  argument
28         if self.__debug:
35     def set_debug(self, state):  argument
36         self.__debug = state
59     def __init__(self, args, syms, log):  argument
66         self.__args = args
67         self.__syms = syms
68         self.__log = log
71         if self.args.sw_isr_table:
72             self.__vt_default_handler = self.__vt_irq_handler
74             self.__vt_default_handler = self.__vt_spurious_handler
76         self.__int_bits = [8, 8, 8]
85         self.__int_lvl_masks = [0x000000FF, 0x0000FF00, 0x00FF0000]
87         self.__irq2_baseoffset = None
88         self.__irq3_baseoffset = None
89         self.__irq2_offsets = None
90         self.__irq3_offsets = None
92         if self.check_multi_level_interrupts():
93             self.__max_irq_per = self.get_sym("CONFIG_MAX_IRQ_PER_AGGREGATOR")
95             self.__int_bits[0] = self.get_sym("CONFIG_1ST_LEVEL_INTERRUPT_BITS")
96             self.__int_bits[1] = self.get_sym("CONFIG_2ND_LEVEL_INTERRUPT_BITS")
97             self.__int_bits[2] = self.get_sym("CONFIG_3RD_LEVEL_INTERRUPT_BITS")
99             if sum(self.int_bits) > 32:
102             self.__int_lvl_masks[0] = self.__bm(self.int_bits[0])
103             self.__int_lvl_masks[1] = self.__bm(self.int_bits[1]) << self.int_bits[0]
104 …     self.__int_lvl_masks[2] = self.__bm(self.int_bits[2]) << (self.int_bits[0] + self.int_bits[1])
106             self.__log.debug("Level    Bits        Bitmask")
107             self.__log.debug("----------------------------")
109                 bitmask_str = "0x" + format(self.__int_lvl_masks[i], '08X')
110                 self.__log.debug(f"{i + 1:>5} {self.__int_bits[i]:>7} {bitmask_str:>14}")
112             if self.check_sym("CONFIG_2ND_LEVEL_INTERRUPTS"):
113                 num_aggregators = self.get_sym("CONFIG_NUM_2ND_LEVEL_AGGREGATORS")
114                 self.__irq2_baseoffset = self.get_sym("CONFIG_2ND_LVL_ISR_TBL_OFFSET")
115                 self.__irq2_offsets = [self.get_sym('CONFIG_2ND_LVL_INTR_{}_OFFSET'.
119                 self.__log.debug('2nd level offsets: {}'.format(self.__irq2_offsets))
121                 if self.check_sym("CONFIG_3RD_LEVEL_INTERRUPTS"):
122                     num_aggregators = self.get_sym("CONFIG_NUM_3RD_LEVEL_AGGREGATORS")
123                     self.__irq3_baseoffset = self.get_sym("CONFIG_3RD_LVL_ISR_TBL_OFFSET")
124                     self.__irq3_offsets = [self.get_sym('CONFIG_3RD_LVL_INTR_{}_OFFSET'.
128                     self.__log.debug('3rd level offsets: {}'.format(self.__irq3_offsets))
131     def args(self):  argument
132         return self.__args
135     def swt_spurious_handler(self):  argument
136         return self.__swt_spurious_handler
139     def swt_shared_handler(self):  argument
140         return self.__swt_shared_handler
143     def vt_default_handler(self):  argument
144         return self.__vt_default_handler
147     def shared_array_name(self):  argument
148         return self.__shared_array_name
151     def sw_isr_array_name(self):  argument
152         return self.__sw_isr_array_name
155     def irq_vector_array_name(self):  argument
156         return self.__irq_vector_array_name
159     def int_bits(self):  argument
160         return self.__int_bits
163     def int_lvl_masks(self):  argument
164         return self.__int_lvl_masks
166     def endian_prefix(self):  argument
167         if self.args.big_endian:
172     def get_irq_baseoffset(self, lvl):  argument
174             return self.__irq2_baseoffset
176             return self.__irq3_baseoffset
177         self.__log.error("Unsupported irq level: {}".format(lvl))
179     def get_irq_index(self, irq, lvl):  argument
181             offsets = self.__irq2_offsets
183             offsets = self.__irq3_offsets
185             self.__log.error("Unsupported irq level: {}".format(lvl))
189             self.__log.error("IRQ {} not present in parent offsets ({}). ".
193     def get_swt_table_index(self, offset, irq):  argument
194         if not self.check_multi_level_interrupts():
197         self.__log.debug('IRQ = ' + hex(irq))
198         irq3 = (irq & self.int_lvl_masks[2]) >> (self.int_bits[0] + self.int_bits[1])
199         irq2 = (irq & self.int_lvl_masks[1]) >> (self.int_bits[0])
200         irq1 = irq & self.int_lvl_masks[0]
203             list_index = self.get_irq_index(irq2 - 1, 3)
204             irq3_pos = self.get_irq_baseoffset(3) + self.__max_irq_per * list_index + irq3 - 1
205             self.__log.debug('IRQ_level = 3')
206             self.__log.debug('IRQ_Indx = ' + str(irq3))
207             self.__log.debug('IRQ_Pos  = ' + str(irq3_pos))
211             list_index = self.get_irq_index(irq1, 2)
212             irq2_pos = self.get_irq_baseoffset(2) + self.__max_irq_per * list_index + irq2 - 1
213             self.__log.debug('IRQ_level = 2')
214             self.__log.debug('IRQ_Indx = ' + str(irq2))
215             self.__log.debug('IRQ_Pos  = ' + str(irq2_pos))
218         self.__log.debug('IRQ_level = 1')
219         self.__log.debug('IRQ_Indx = ' + str(irq1))
220         self.__log.debug('IRQ_Pos  = ' + str(irq1))
223     def get_intlist_snames(self):  argument
224         return self.args.intlist_section
226     def test_isr_direct(self, flags):  argument
227         return flags & self.__ISR_FLAG_DIRECT
229     def get_sym_from_addr(self, addr):  argument
230         for key, value in self.__syms.items():
235     def get_sym(self, name):  argument
236         return self.__syms.get(name)
238     def check_sym(self, name):  argument
239         return name in self.__syms
241     def check_multi_level_interrupts(self):  argument
242         return self.check_sym("CONFIG_MULTI_LEVEL_INTERRUPTS")
244     def check_shared_interrupts(self):  argument
245         return self.check_sym("CONFIG_SHARED_INTERRUPTS")
247     def check_64b(self):  argument
248         return self.check_sym("CONFIG_64BIT")