Lines Matching full:cache

9  * Public APIs for external cache controller drivers
18 * @brief External Cache Controller Interface
19 * @defgroup cache_external_interface External Cache Controller Interface
31 * @brief Enable the d-cache
33 * Enable the data cache.
38 * @brief Disable the d-cache
40 * Disable the data cache.
45 * @brief Flush the d-cache
47 * Flush the whole data cache.
56 * @brief Invalidate the d-cache
58 * Invalidate the whole data cache.
67 * @brief Flush and Invalidate the d-cache
69 * Flush and Invalidate the whole data cache.
78 * @brief Flush an address range in the d-cache
80 * Flush the specified address range of the data cache.
82 * @note the cache operations act on cache line. When multiple data structures
83 * share the same cache line being flushed, all the portions of the
99 * @brief Invalidate an address range in the d-cache
101 * Invalidate the specified address range of the data cache.
103 * @note the cache operations act on cache line. When multiple data structures
104 * share the same cache line being invalidated, all the portions of the
107 * data loss and/or corruption. When @p addr is not aligned to the cache
108 * line and/or @p size is not a multiple of the cache line size the
121 * @brief Flush and Invalidate an address range in the d-cache
123 * Flush and Invalidate the specified address range of the data cache.
125 * @note the cache operations act on cache line. When multiple data structures
126 * share the same cache line being flushed, all the portions of the
145 * @brief Get the d-cache line size.
147 * The API is provided to dynamically detect the data cache line size at run
153 * @retval size Size of the d-cache line.
154 * @retval 0 If the d-cache is not enabled.
165 * @brief Enable the i-cache
167 * Enable the instruction cache.
172 * @brief Disable the i-cache
174 * Disable the instruction cache.
179 * @brief Flush the i-cache
181 * Flush the whole instruction cache.
190 * @brief Invalidate the i-cache
192 * Invalidate the whole instruction cache.
201 * @brief Flush and Invalidate the i-cache
203 * Flush and Invalidate the whole instruction cache.
212 * @brief Flush an address range in the i-cache
214 * Flush the specified address range of the instruction cache.
216 * @note the cache operations act on cache line. When multiple data structures
217 * share the same cache line being flushed, all the portions of the
233 * @brief Invalidate an address range in the i-cache
235 * Invalidate the specified address range of the instruction cache.
237 * @note the cache operations act on cache line. When multiple data structures
238 * share the same cache line being invalidated, all the portions of the
241 * data loss and/or corruption. When @p addr is not aligned to the cache
242 * line and/or @p size is not a multiple of the cache line size the
255 * @brief Flush and Invalidate an address range in the i-cache
257 * Flush and Invalidate the specified address range of the instruction cache.
259 * @note the cache operations act on cache line. When multiple data structures
260 * share the same cache line being flushed, all the portions of the
279 * @brief Get the i-cache line size.
281 * The API is provided to dynamically detect the instruction cache line size at
287 * @retval size Size of the d-cache line.
288 * @retval 0 If the d-cache is not enabled.