Lines Matching +full:location +full:- +full:tx
5 * SPDX-License-Identifier: Apache-2.0
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84 /* Has any enabled uart instance hw-flow-control enabled? */
91 /* Has any enabled usart instance hw-flow-control enabled? */
161 const struct uart_gecko_config *config = dev->config; in uart_gecko_poll_in()
162 uint32_t flags = USART_StatusGet(config->base); in uart_gecko_poll_in()
165 *c = USART_Rx(config->base); in uart_gecko_poll_in()
169 return -1; in uart_gecko_poll_in()
174 const struct uart_gecko_config *config = dev->config; in uart_gecko_poll_out()
176 USART_Tx(config->base, c); in uart_gecko_poll_out()
181 const struct uart_gecko_config *config = dev->config; in uart_gecko_err_check()
182 uint32_t flags = USART_IntGet(config->base); in uart_gecko_err_check()
197 USART_IntClear(config->base, USART_IF_RXOF | in uart_gecko_err_check()
208 const struct uart_gecko_config *config = dev->config; in uart_gecko_fifo_fill()
211 while ((len - num_tx > 0) && in uart_gecko_fifo_fill()
212 (config->base->STATUS & USART_STATUS_TXBL)) { in uart_gecko_fifo_fill()
214 config->base->TXDATA = (uint32_t)tx_data[num_tx++]; in uart_gecko_fifo_fill()
223 const struct uart_gecko_config *config = dev->config; in uart_gecko_fifo_read()
226 while ((len - num_rx > 0) && in uart_gecko_fifo_read()
227 (config->base->STATUS & USART_STATUS_RXDATAV)) { in uart_gecko_fifo_read()
229 rx_data[num_rx++] = (uint8_t)config->base->RXDATA; in uart_gecko_fifo_read()
237 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_enable()
240 USART_IntEnable(config->base, mask); in uart_gecko_irq_tx_enable()
245 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_disable()
248 USART_IntDisable(config->base, mask); in uart_gecko_irq_tx_disable()
253 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_complete()
254 uint32_t flags = USART_IntGet(config->base); in uart_gecko_irq_tx_complete()
256 USART_IntClear(config->base, USART_IF_TXC); in uart_gecko_irq_tx_complete()
263 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_ready()
264 uint32_t flags = USART_IntGetEnabled(config->base); in uart_gecko_irq_tx_ready()
271 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_enable()
274 USART_IntEnable(config->base, mask); in uart_gecko_irq_rx_enable()
279 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_disable()
282 USART_IntDisable(config->base, mask); in uart_gecko_irq_rx_disable()
287 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_full()
288 uint32_t flags = USART_IntGet(config->base); in uart_gecko_irq_rx_full()
295 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_ready()
298 return (config->base->IEN & mask) in uart_gecko_irq_rx_ready()
304 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_err_enable()
306 USART_IntEnable(config->base, USART_IF_RXOF | in uart_gecko_irq_err_enable()
313 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_err_disable()
315 USART_IntDisable(config->base, USART_IF_RXOF | in uart_gecko_irq_err_disable()
334 struct uart_gecko_data *data = dev->data; in uart_gecko_irq_callback_set()
336 data->callback = cb; in uart_gecko_irq_callback_set()
337 data->cb_data = cb_data; in uart_gecko_irq_callback_set()
342 struct uart_gecko_data *data = dev->data; in uart_gecko_isr()
344 if (data->callback) { in uart_gecko_isr()
345 data->callback(dev, data->cb_data); in uart_gecko_isr()
358 const struct uart_gecko_config *config = dev->config; in uart_gecko_init_pins()
360 /* Configure RX and TX */ in uart_gecko_init_pins()
361 GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin, in uart_gecko_init_pins()
362 config->pin_rx.mode, config->pin_rx.out); in uart_gecko_init_pins()
363 GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin, in uart_gecko_init_pins()
364 config->pin_tx.mode, config->pin_tx.out); in uart_gecko_init_pins()
368 config->base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN; in uart_gecko_init_pins()
369 config->base->ROUTELOC0 = in uart_gecko_init_pins()
370 (config->loc_tx << _USART_ROUTELOC0_TXLOC_SHIFT) | in uart_gecko_init_pins()
371 (config->loc_rx << _USART_ROUTELOC0_RXLOC_SHIFT); in uart_gecko_init_pins()
372 config->base->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE; in uart_gecko_init_pins()
374 /* For olders SOCs with only one pin location */ in uart_gecko_init_pins()
375 config->base->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN in uart_gecko_init_pins()
376 | (config->loc << 8); in uart_gecko_init_pins()
378 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN = in uart_gecko_init_pins()
380 GPIO->USARTROUTE[USART_NUM(config->base)].TXROUTE = in uart_gecko_init_pins()
381 (config->pin_tx.pin << _GPIO_USART_TXROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
382 (config->pin_tx.port << _GPIO_USART_TXROUTE_PORT_SHIFT); in uart_gecko_init_pins()
383 GPIO->USARTROUTE[USART_NUM(config->base)].RXROUTE = in uart_gecko_init_pins()
384 (config->pin_rx.pin << _GPIO_USART_RXROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
385 (config->pin_rx.port << _GPIO_USART_RXROUTE_PORT_SHIFT); in uart_gecko_init_pins()
390 if (config->hw_flowcontrol) { in uart_gecko_init_pins()
391 GPIO_PinModeSet(config->pin_rts.port, config->pin_rts.pin, in uart_gecko_init_pins()
392 config->pin_rts.mode, config->pin_rts.out); in uart_gecko_init_pins()
393 GPIO_PinModeSet(config->pin_cts.port, config->pin_cts.pin, in uart_gecko_init_pins()
394 config->pin_cts.mode, config->pin_cts.out); in uart_gecko_init_pins()
397 config->base->ROUTEPEN = in uart_gecko_init_pins()
403 config->base->ROUTELOC1 = in uart_gecko_init_pins()
404 (config->loc_rts << _USART_ROUTELOC1_RTSLOC_SHIFT) | in uart_gecko_init_pins()
405 (config->loc_cts << _USART_ROUTELOC1_CTSLOC_SHIFT); in uart_gecko_init_pins()
407 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN = in uart_gecko_init_pins()
413 GPIO->USARTROUTE[USART_NUM(config->base)].RTSROUTE = in uart_gecko_init_pins()
414 (config->pin_rts.pin << _GPIO_USART_RTSROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
415 (config->pin_rts.port << _GPIO_USART_RTSROUTE_PORT_SHIFT); in uart_gecko_init_pins()
416 GPIO->USARTROUTE[USART_NUM(config->base)].CTSROUTE = in uart_gecko_init_pins()
417 (config->pin_cts.pin << _GPIO_USART_CTSROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
418 (config->pin_cts.port << _GPIO_USART_CTSROUTE_PORT_SHIFT); in uart_gecko_init_pins()
436 const struct uart_gecko_config *config = dev->config; in uart_gecko_init()
445 CMU_ClockEnable(config->clock, true); in uart_gecko_init()
448 usartInit.baudrate = config->baud_rate; in uart_gecko_init()
450 usartInit.hwFlowControl = config->hw_flowcontrol ? in uart_gecko_init()
453 USART_InitAsync(config->base, &usartInit); in uart_gecko_init()
456 err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in uart_gecko_init()
466 config->irq_config_func(dev); in uart_gecko_init()
508 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
509 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
513 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \
532 "DTS location-* properties must have identical value")
566 "DTS location-rts and location-cts are mandatory")), \
653 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
654 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
658 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \