Lines Matching full:timing

27       atmel,smc-setup-timing = <1 1 1 1>;
28       atmel,smc-pulse-timing = <6 6 6 6>;
29       atmel,smc-cycle-timing = <7 7>;
37   55ns, as per specification, it requires atmel,smc-cycle-timing of at least
38   7 pulses (56ns). The atmel,smc-cycle-timing is composed of three parts:
43   Note: Since no hold parameter is available at SMC the atmel,smc-cycle-timing
47     cycle-timing (7) = setup (1) + pulse (6) + hold (0)
50     cycle-timing (10) = setup (1) + pulse (6) + hold (3)
117     atmel,smc-setup-timing:
129     atmel,smc-pulse-timing:
139     atmel,smc-cycle-timing:
143         SMC timing configurations in cycles for the total write and read
145         This value describes the entire write/read operation timing which
147         Value has to be greater or equal to setup + pulse timing and