29 #define SPI_TFMAT(base)		(base + REG_TFMAT)  argument
30 #define SPI_TCTRL(base)		(base + REG_TCTRL)  argument
31 #define SPI_CMD(base)		(base + REG_CMD)  argument
32 #define SPI_DATA(base)		(base + REG_DATA)  argument
33 #define SPI_CTRL(base)		(base + REG_CTRL)  argument
34 #define SPI_STAT(base)		(base + REG_STAT)  argument
35 #define SPI_INTEN(base)		(base + REG_INTEN)  argument
36 #define SPI_INTST(base)		(base + REG_INTST)  argument
37 #define SPI_TIMIN(base)		(base + REG_TIMIN)  argument
38 #define SPI_CONFIG(base)	(base + REG_CONFIG)  argument
103 #define TX_FIFO_SIZE_SETTING(base)	\  argument
104 	(sys_read32(SPI_CONFIG(base)) & CFG_TX_FIFO_SIZE_MSK)
105 #define TX_FIFO_SIZE(base)		\  argument
106 	(2 << (TX_FIFO_SIZE_SETTING(base) >> 4))
108 #define RX_FIFO_SIZE_SETTING(base)	\  argument
109 	(sys_read32(SPI_CONFIG(base)) & CFG_RX_FIFO_SIZE_MSK)
110 #define RX_FIFO_SIZE(base)		\  argument
111 	(2 << (RX_FIFO_SIZE_SETTING(base) >> 0))
113 #define TX_NUM_STAT(base)	(sys_read32(SPI_STAT(base)) & STAT_TX_NUM_MSK)  argument
114 #define RX_NUM_STAT(base)	(sys_read32(SPI_STAT(base)) & STAT_RX_NUM_MSK)  argument
115 #define GET_TX_NUM(base)	(TX_NUM_STAT(base) >> 16)  argument
116 #define GET_RX_NUM(base)	(RX_NUM_STAT(base) >> 8)  argument