Lines Matching full:timer
79 /** Timer clock (Hz). */
90 TIM_TypeDef *timer; member
101 /** Maximum number of timer channels : some stm32 soc have 6 else only 4 */
131 /** Maximum number of complemented timer channels is ARRAY_SIZE(ch2ll_n)*/
217 * Obtain timer clock speed.
219 * @param pclken Timer clock control subsystem.
220 * @param tim_clk Where computed timer clock will be stored.
271 * Up to a certain threshold value of APB{1,2} prescaler, timer clock in get_tim_clk()
273 * (2 if TIMPRE=0, 4 if TIMPRE=1). Above threshold, timer clock is set in get_tim_clk()
301 * If the APB prescaler equals 1, the timer clock frequencies in get_tim_clk()
335 if (!IS_TIM_32B_COUNTER_INSTANCE(cfg->timer) && in pwm_stm32_set_cycles()
341 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_set_cycles()
342 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_set_cycles()
371 LL_TIM_CC_DisableChannel(cfg->timer, current_ll_channel); in pwm_stm32_set_cycles()
390 if (!LL_TIM_CC_IsEnabledChannel(cfg->timer, current_ll_channel)) { in pwm_stm32_set_cycles()
404 oc_init.OCState = LL_TIM_CC_IsEnabledChannel(cfg->timer, ll_channel) in pwm_stm32_set_cycles()
407 oc_init.OCPolarity = LL_TIM_OC_GetPolarity(cfg->timer, ll_channel); in pwm_stm32_set_cycles()
415 LL_TIM_CC_IsEnabledChannel(cfg->timer, negative_ll_channel) in pwm_stm32_set_cycles()
419 LL_TIM_OC_GetPolarity(cfg->timer, negative_ll_channel); in pwm_stm32_set_cycles()
430 if (IS_TIM_SLAVE_INSTANCE(cfg->timer)) { in pwm_stm32_set_cycles()
431 LL_TIM_SetSlaveMode(cfg->timer, in pwm_stm32_set_cycles()
433 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_ITR0); in pwm_stm32_set_cycles()
434 LL_TIM_DisableMasterSlaveMode(cfg->timer); in pwm_stm32_set_cycles()
439 if (LL_TIM_OC_Init(cfg->timer, ll_channel, &oc_init) != SUCCESS) { in pwm_stm32_set_cycles()
440 LOG_ERR("Could not initialize timer channel output"); in pwm_stm32_set_cycles()
444 LL_TIM_EnableARRPreload(cfg->timer); in pwm_stm32_set_cycles()
446 LL_TIM_OC_EnablePreload(cfg->timer, ll_channel); in pwm_stm32_set_cycles()
447 LL_TIM_SetAutoReload(cfg->timer, period_cycles); in pwm_stm32_set_cycles()
448 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_set_cycles()
451 LL_TIM_OC_SetPolarity(cfg->timer, current_ll_channel, get_polarity(flags)); in pwm_stm32_set_cycles()
452 set_timer_compare[channel - 1u](cfg->timer, pulse_cycles); in pwm_stm32_set_cycles()
453 LL_TIM_SetAutoReload(cfg->timer, period_cycles); in pwm_stm32_set_cycles()
475 if (LL_TIM_IC_Init(cfg->timer, ch2ll[channel - 1], &ic) != SUCCESS) { in init_capture_channels()
484 if (LL_TIM_IC_Init(cfg->timer, ch2ll[complimentary_channel[channel] - 1], &ic) != SUCCESS) { in init_capture_channels()
527 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_configure_capture()
528 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_configure_capture()
538 if (!cfg->four_channel_capture_support && !IS_TIM_SLAVE_INSTANCE(cfg->timer)) { in pwm_stm32_configure_capture()
540 LOG_ERR("Timer does not support slave mode for PWM capture"); in pwm_stm32_configure_capture()
551 LL_TIM_SetSlaveMode(cfg->timer, LL_TIM_SLAVEMODE_DISABLED); in pwm_stm32_configure_capture()
560 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_TI1FP1); in pwm_stm32_configure_capture()
562 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_TI2FP2); in pwm_stm32_configure_capture()
564 LL_TIM_SetSlaveMode(cfg->timer, LL_TIM_SLAVEMODE_RESET); in pwm_stm32_configure_capture()
567 LL_TIM_EnableARRPreload(cfg->timer); in pwm_stm32_configure_capture()
568 if (!IS_TIM_32B_COUNTER_INSTANCE(cfg->timer)) { in pwm_stm32_configure_capture()
569 LL_TIM_SetAutoReload(cfg->timer, 0xffffu); in pwm_stm32_configure_capture()
571 LL_TIM_SetAutoReload(cfg->timer, 0xffffffffu); in pwm_stm32_configure_capture()
573 LL_TIM_EnableUpdateEvent(cfg->timer); in pwm_stm32_configure_capture()
596 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_enable_capture()
597 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_enable_capture()
612 clear_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_enable_capture()
613 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
615 LL_TIM_SetUpdateSource(cfg->timer, LL_TIM_UPDATESOURCE_COUNTER); in pwm_stm32_enable_capture()
617 enable_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_enable_capture()
619 LL_TIM_CC_EnableChannel(cfg->timer, ch2ll[channel - 1]); in pwm_stm32_enable_capture()
620 LL_TIM_CC_EnableChannel(cfg->timer, ch2ll[complimentary_channel[channel] - 1]); in pwm_stm32_enable_capture()
621 LL_TIM_EnableIT_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
622 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
643 LL_TIM_SetUpdateSource(cfg->timer, LL_TIM_UPDATESOURCE_REGULAR); in pwm_stm32_disable_capture()
645 disable_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_disable_capture()
647 LL_TIM_DisableIT_UPDATE(cfg->timer); in pwm_stm32_disable_capture()
648 LL_TIM_CC_DisableChannel(cfg->timer, ch2ll[channel - 1]); in pwm_stm32_disable_capture()
649 LL_TIM_CC_DisableChannel(cfg->timer, ch2ll[complimentary_channel[channel] - 1]); in pwm_stm32_disable_capture()
662 if (LL_TIM_IsActiveFlag_UPDATE(cfg->timer)) { in pwm_stm32_isr()
663 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_isr()
666 if (LL_TIM_IsActiveFlag_CC1(cfg->timer) in pwm_stm32_isr()
667 || LL_TIM_IsActiveFlag_CC2(cfg->timer) in pwm_stm32_isr()
668 || LL_TIM_IsActiveFlag_CC3(cfg->timer) in pwm_stm32_isr()
669 || LL_TIM_IsActiveFlag_CC4(cfg->timer)) { in pwm_stm32_isr()
670 LL_TIM_ClearFlag_CC1(cfg->timer); in pwm_stm32_isr()
671 LL_TIM_ClearFlag_CC2(cfg->timer); in pwm_stm32_isr()
672 LL_TIM_ClearFlag_CC3(cfg->timer); in pwm_stm32_isr()
673 LL_TIM_ClearFlag_CC4(cfg->timer); in pwm_stm32_isr()
680 if (LL_TIM_IsActiveFlag_UPDATE(cfg->timer)) { in pwm_stm32_isr()
681 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_isr()
692 if (is_capture_active[cpt->channel - 1](cfg->timer) || in pwm_stm32_isr()
693 is_capture_active[complimentary_channel[cpt->channel] - 1](cfg->timer)) { in pwm_stm32_isr()
694 clear_capture_interrupt[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
696 [complimentary_channel[cpt->channel] - 1](cfg->timer); in pwm_stm32_isr()
698 cpt->period = get_channel_capture[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
700 [complimentary_channel[cpt->channel] - 1](cfg->timer); in pwm_stm32_isr()
704 is_capture_active[cpt->channel - 1](cfg->timer)) { in pwm_stm32_isr()
715 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_isr()
719 is_capture_active[cpt->channel - 1](cfg->timer)) { in pwm_stm32_isr()
722 * the timer value when the pulse and period ended respectively. in pwm_stm32_isr()
725 (cfg->timer); in pwm_stm32_isr()
726 cpt->period = get_channel_capture[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
729 clear_capture_interrupt[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
803 LOG_ERR("Could not obtain timer clock (%d)", r); in pwm_stm32_init()
807 /* Reset timer to default state using RCC */ in pwm_stm32_init()
817 /* initialize timer */ in pwm_stm32_init()
825 if (LL_TIM_Init(cfg->timer, &init) != SUCCESS) { in pwm_stm32_init()
826 LOG_ERR("Could not initialize timer"); in pwm_stm32_init()
832 if (IS_TIM_BREAK_INSTANCE(cfg->timer)) { in pwm_stm32_init()
833 LL_TIM_EnableAllOutputs(cfg->timer); in pwm_stm32_init()
837 LL_TIM_EnableCounter(cfg->timer); in pwm_stm32_init()
898 .timer = (TIM_TypeDef *)DT_REG_ADDR(PWM(index)), \
901 .pclken = DT_INST_CLK(index, timer), \