Lines Matching full:irq
45 * The lower 32 bit value of the redirection table entries for IRQ 0
46 * to 15 are edge triggered positive high, and for IRQ 16 to 23 are level
99 #define BIT_POS_FOR_IRQ_OPTION(irq, option) ((irq) * BITS_PER_IRQ + (option)) argument
101 /* Allocating up to 256 irq bits bufffer for RTEs, RTEs are dynamically found
112 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32);
113 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32);
114 static uint32_t ioApicRedGetLo(unsigned int irq);
115 static void IoApicRedUpdateLo(unsigned int irq, uint32_t value,
144 * interrupt controller driver due to the IRQ virtualization imposed by
192 * @param irq IRQ number to enable
195 void z_ioapic_irq_enable(unsigned int irq) in z_ioapic_irq_enable() argument
197 IoApicRedUpdateLo(irq, 0, IOAPIC_INT_MASK); in z_ioapic_irq_enable()
204 * @param irq IRQ number to disable
207 void z_ioapic_irq_disable(unsigned int irq) in z_ioapic_irq_disable() argument
209 IoApicRedUpdateLo(irq, IOAPIC_INT_MASK, IOAPIC_INT_MASK); in z_ioapic_irq_disable()
216 void store_flags(unsigned int irq, uint32_t flags) in store_flags() argument
221 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_HI_LO)); in store_flags()
226 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_LVL_EDGE)); in store_flags()
231 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_ENBL_DSBL)); in store_flags()
240 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_DELIV_MODE)); in store_flags()
245 uint32_t restore_flags(unsigned int irq) in restore_flags() argument
250 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_HI_LO))) { in restore_flags()
255 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_LVL_EDGE))) { in restore_flags()
260 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_ENBL_DSBL))) { in restore_flags()
265 BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_DELIV_MODE))) { in restore_flags()
276 int irq; in ioapic_suspend() local
281 for (irq = 0; irq < ioapic_rtes; irq++) { in ioapic_suspend()
284 * IRQ lines, so as to limit ourselves to saving the in ioapic_suspend()
287 if (_irq_to_interrupt_vector[irq]) { in ioapic_suspend()
288 rte_lo = ioApicRedGetLo(irq); in ioapic_suspend()
289 store_flags(irq, rte_lo); in ioapic_suspend()
298 int irq; in ioapic_resume_from_suspend() local
304 for (irq = 0; irq < ioapic_rtes; irq++) { in ioapic_resume_from_suspend()
305 if (_irq_to_interrupt_vector[irq]) { in ioapic_resume_from_suspend()
307 flags = restore_flags(irq); in ioapic_resume_from_suspend()
311 rteValue = (_irq_to_interrupt_vector[irq] & in ioapic_resume_from_suspend()
319 ioApicRedSetHi(irq, DEFAULT_RTE_DEST); in ioapic_resume_from_suspend()
320 ioApicRedSetLo(irq, rteValue); in ioapic_resume_from_suspend()
354 * This routine sets up the redirection table entry for the specified IRQ
355 * @param irq Virtualized IRQ
360 void z_ioapic_irq_set(unsigned int irq, unsigned int vector, uint32_t flags) argument
373 irte_idx = vtd_get_irte_by_irq(vtd, irq);
380 ioApicRedSetHi(irq, rteValue);
390 ioApicRedSetLo(irq, rteValue);
403 ioApicRedSetHi(irq, DEFAULT_RTE_DEST);
404 ioApicRedSetLo(irq, rteValue);
409 * @brief Program interrupt vector for specified irq
412 * Table for specified irq number
414 * @param irq Interrupt number
418 void z_ioapic_int_vec_set(unsigned int irq, unsigned int vector) argument
420 IoApicRedUpdateLo(irq, vector, IOAPIC_VEC_MASK);
477 * @param irq INTIN number
481 static uint32_t ioApicRedGetLo(unsigned int irq) argument
483 int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
493 * @param irq INTIN number
497 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32) argument
499 int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
509 * @param irq INTIN number
513 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32) argument
515 int32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
526 * @param irq INTIN number
531 static void IoApicRedUpdateLo(unsigned int irq, argument
535 ioApicRedSetLo(irq, (ioApicRedGetLo(irq) & ~mask) | (value & mask));