Lines Matching full:architecture

12     the Intel x86 architecture, the SPARC architecture and ARCv2 SoCs
14     are architecture specific.
59 floating point registers. Depending upon the underlying CPU architecture,
75 ARM Cortex-M architecture (with the Floating Point Extension)
82 On the ARM Cortex-M architecture with the Floating Point Extension, the kernel
118 architecture, minimizing interrupt latency, when the floating
136 ARM64 architecture
145 On the ARM64 (Aarch64) architecture the kernel treats each thread as a FPU
162 ARCv2 architecture
165 On the ARCv2 architecture, the kernel treats each thread as a non-user
190 RISC-V architecture
193 On the RISC-V architecture the kernel treats each thread as an FPU
225 SPARC architecture
228 On the SPARC architecture, the kernel treats each thread as a non-user
253 x86 architecture
256 On the x86 architecture the kernel treats each thread as a non-user,