Lines Matching full:arc
1 # ARC options
6 menu "ARC Options"
7 depends on ARC
10 default "arc"
17 This option signifies the use of an ARC EM CPU
23 This option signifies the use of an ARC HS CPU
27 prompt "ARC Instruction Set"
31 bool "ARC ISA v2"
38 v2 ISA for the ARC-HS & ARC-EM cores
41 bool "ARC ISA v3"
54 If y, the SoC uses an ARC EM4 CPU
60 If y, the SoC uses an ARC EM4 DMIPS CPU
66 If y, the SoC uses an ARC EM4 DMIPS CPU with the single-precision
73 If y, the SoC uses an ARC EM4 DMIPS CPU with single-precision
82 If y, the SoC uses an ARC EM6 CPU
90 If y, the SoC uses an ARC HS3x CPU
110 If y, the SoC uses an ARC HS6x CPU
119 If y, the SoC uses an ARC HS6x CPU
126 menu "ARC CPU Options"
167 The ARC CPU can be configured to have more than one register
210 bool "ARC has STACK_CHECKING"
214 ARC is configured with STACK_CHECKING which is a mechanism for
219 bool "ARC has ARC connect"
222 ARC is configured with ARC CONNECT which is a hardware for connecting
229 Use ARC STACK_CHECKING to do stack protection
239 - The ARC stack checking, or
244 selection of the ARC stack checking is
252 ARC EM cores w/o secure shield 2+2 mode support might be configured
261 Disable current Thread Local Storage for ARC. For cores with more then one
277 The ARC CPU can be configured to have two busses;
294 bool "ARC has SecureShield"
299 This option is enabled when ARC core supports secure mode
317 applicable to ARC processors that implement the SecureShield.
324 and normal resources of the ARC processors.
335 mode. The option is only applicable to ARC processors that
343 resources of the ARC processors, and, therefore, it shall avoid
346 source "arch/arc/core/dsp/Kconfig"
348 menu "ARC MPU Options"
357 source "arch/arc/core/mpu/Kconfig"
365 int "ARC exception handling stack size"