Lines Matching full:line
32 size_t line; in arch_dcache_flush_range() local
34 for (line = first; bytes && line < last; line += step) { in arch_dcache_flush_range()
35 __asm__ volatile("dhwb %0, 0" :: "r"(line)); in arch_dcache_flush_range()
47 size_t line; in arch_dcache_flush_and_invd_range() local
49 for (line = first; bytes && line < last; line += step) { in arch_dcache_flush_and_invd_range()
50 __asm__ volatile("dhwbi %0, 0" :: "r"(line)); in arch_dcache_flush_and_invd_range()
62 size_t line; in arch_dcache_invd_range() local
64 for (line = first; bytes && line < last; line += step) { in arch_dcache_invd_range()
65 __asm__ volatile("dhi %0, 0" :: "r"(line)); in arch_dcache_invd_range()
75 size_t line; in arch_dcache_invd_all() local
77 for (line = 0; line < XCHAL_DCACHE_SIZE; line += step) { in arch_dcache_invd_all()
78 __asm__ volatile("dii %0, 0" :: "r"(line)); in arch_dcache_invd_all()
88 size_t line; in arch_dcache_flush_all() local
90 for (line = 0; line < XCHAL_DCACHE_SIZE; line += step) { in arch_dcache_flush_all()
91 __asm__ volatile("diwb %0, 0" :: "r"(line)); in arch_dcache_flush_all()
101 size_t line; in arch_dcache_flush_and_invd_all() local
103 for (line = 0; line < XCHAL_DCACHE_SIZE; line += step) { in arch_dcache_flush_and_invd_all()
104 __asm__ volatile("diwbi %0, 0" :: "r"(line)); in arch_dcache_flush_and_invd_all()