Lines Matching +full:dvs +full:- +full:bit
3 * Copyright (c) 2019-2020 Jyunlin Chen <jyunlin.chen@ite.com.tw>
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/dt-util.h>
10 #include <zephyr/dt-bindings/adc/adc.h>
11 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
12 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/i2c/it8xxx2-i2c.h>
15 #include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
16 #include <zephyr/dt-bindings/pwm/pwm.h>
17 #include <zephyr/dt-bindings/pwm/it8xxx2_pwm.h>
18 #include <zephyr/dt-bindings/sensor/it8xxx2_vcmp.h>
19 #include <zephyr/dt-bindings/sensor/it8xxx2_tach.h>
20 #include <zephyr/dt-bindings/gpio/gpio.h>
21 #include "ite/it8xxx2-wuc-map.dtsi"
24 #address-cells = <1>;
25 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "ite,riscv-ite";
35 cpu-power-states = <&standby>;
38 power-states {
40 compatible = "zephyr,power-state";
41 power-state-name = "standby";
42 min-residency-us = <500>;
48 #address-cells = <1>;
49 #size-cells = <1>;
52 bbram: bb-ram@f02200 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 compatible = "ite,it8xxx2-bbram";
59 flashctrl: flash-controller@f01000 {
60 compatible = "ite,it8xxx2-flash-controller";
62 #address-cells = <1>;
63 #size-cells = <1>;
66 compatible = "soc-nv-flash";
68 erase-block-size = <4096>;
69 write-block-size = <4>;
74 compatible = "mmio-sram";
78 compatible = "ite,it8xxx2-ilm";
109 current-speed = <115200>;
110 clock-frequency = <1843200>;
112 interrupt-parent = <&intc>;
113 reg-shift = <0>;
119 current-speed = <460800>;
120 clock-frequency = <1843200>;
122 interrupt-parent = <&intc>;
123 reg-shift = <0>;
127 compatible = "ite,it8xxx2-uart";
130 port-num = <1>;
132 uart-dev = <&uart1>;
136 compatible = "ite,it8xxx2-uart";
139 port-num = <2>;
141 uart-dev = <&uart2>;
145 compatible = "ite,it8xxx2-timer";
153 interrupt-parent = <&intc>;
157 compatible = "ite,it8xxx2-gpio";
163 gpio-controller;
172 interrupt-parent = <&intc>;
173 #gpio-cells = <2>;
177 compatible = "ite,it8xxx2-gpio";
183 gpio-controller;
192 interrupt-parent = <&intc>;
193 wakeup-source; /* WUI53 */
194 #gpio-cells = <2>;
198 compatible = "ite,it8xxx2-gpio";
204 gpio-controller;
213 interrupt-parent = <&intc>;
214 #gpio-cells = <2>;
218 compatible = "ite,it8xxx2-gpio";
224 gpio-controller;
233 interrupt-parent = <&intc>;
234 #gpio-cells = <2>;
238 compatible = "ite,it8xxx2-gpio";
244 gpio-controller;
253 interrupt-parent = <&intc>;
254 #gpio-cells = <2>;
258 compatible = "ite,it8xxx2-gpio";
264 gpio-controller;
273 interrupt-parent = <&intc>;
274 #gpio-cells = <2>;
278 compatible = "ite,it8xxx2-gpio";
284 gpio-controller;
293 interrupt-parent = <&intc>;
294 #gpio-cells = <2>;
298 compatible = "ite,it8xxx2-gpio";
304 gpio-controller;
313 interrupt-parent = <&intc>;
314 wakeup-source; /* WUI17 */
315 #gpio-cells = <2>;
319 compatible = "ite,it8xxx2-gpio";
325 gpio-controller;
334 interrupt-parent = <&intc>;
335 #gpio-cells = <2>;
339 compatible = "ite,it8xxx2-gpio";
345 gpio-controller;
354 interrupt-parent = <&intc>;
355 #gpio-cells = <2>;
359 compatible = "ite,it8xxx2-gpio";
365 gpio-controller;
374 interrupt-parent = <&intc>;
375 #gpio-cells = <2>;
379 compatible = "ite,it8xxx2-gpio";
385 gpio-controller;
394 interrupt-parent = <&intc>;
395 #gpio-cells = <2>;
399 compatible = "ite,it8xxx2-gpio";
405 gpio-controller;
414 interrupt-parent = <&intc>;
415 #gpio-cells = <2>;
419 compatible = "ite,it8xxx2-espi";
436 interrupt-parent = <&intc>;
438 #address-cells = <1>;
439 #size-cells = <1>;
444 #address-cells = <1>;
445 #size-cells = <0>;
446 compatible = "ite,it8xxx2-sspi";
448 interrupt-parent = <&intc>;
450 clock-frequency = <115200>;
453 #address-cells = <1>;
454 #size-cells = <0>;
455 compatible = "ite,it8xxx2-sspi";
458 interrupt-parent = <&intc>;
462 compatible = "ite,it8xxx2-shi";
465 interrupt-parent = <&intc>;
467 buffer-rx-size = <256>;
468 buffer-tx-size = <256>;
471 compatible = "ite,it8xxx2-adc";
474 interrupt-parent = <&intc>;
476 #io-channel-cells = <1>;
479 compatible = "ite,it8xxx2-vcmp";
488 interrupt-parent = <&intc>;
489 vcmp-ch = <VCMP_CHANNEL_0>;
493 compatible = "ite,it8xxx2-vcmp";
502 interrupt-parent = <&intc>;
503 vcmp-ch = <VCMP_CHANNEL_1>;
507 compatible = "ite,it8xxx2-vcmp";
516 interrupt-parent = <&intc>;
517 vcmp-ch = <VCMP_CHANNEL_2>;
521 compatible = "ite,it8xxx2-vcmp";
530 interrupt-parent = <&intc>;
531 vcmp-ch = <VCMP_CHANNEL_3>;
535 compatible = "ite,it8xxx2-vcmp";
544 interrupt-parent = <&intc>;
545 vcmp-ch = <VCMP_CHANNEL_4>;
549 compatible = "ite,it8xxx2-vcmp";
558 interrupt-parent = <&intc>;
559 vcmp-ch = <VCMP_CHANNEL_5>;
563 ecpm: clock-controller@f01e00 {
564 compatible = "ite,it8xxx2-ecpm";
566 reg-names = "ecpm";
569 compatible = "ite,it8xxx2-pwmprs";
573 compatible = "ite,it8xxx2-pwm";
581 #pwm-cells = <3>;
584 compatible = "ite,it8xxx2-pwm";
592 #pwm-cells = <3>;
595 compatible = "ite,it8xxx2-pwm";
603 #pwm-cells = <3>;
606 compatible = "ite,it8xxx2-pwm";
614 #pwm-cells = <3>;
617 compatible = "ite,it8xxx2-pwm";
625 #pwm-cells = <3>;
628 compatible = "ite,it8xxx2-pwm";
636 #pwm-cells = <3>;
639 compatible = "ite,it8xxx2-pwm";
647 #pwm-cells = <3>;
650 compatible = "ite,it8xxx2-pwm";
658 #pwm-cells = <3>;
661 compatible = "ite,it8xxx2-tach";
665 dvs-bit = <BIT(3)>;
666 chsel-bit = <BIT(2)>;
670 compatible = "ite,it8xxx2-tach";
674 dvs-bit = <BIT(1)>;
675 chsel-bit = <BIT(0)>;
679 gctrl: general-control@f02000 {
680 compatible = "ite,it8xxx2-gctrl";
685 compatible = "ite,it8xxx2-peci";
687 #address-cells=<1>;
688 #size-cells = <0>;
689 interrupt-parent = <&intc>;
695 compatible = "ite,it8xxx2-kscan";
697 interrupt-parent = <&intc>;
708 kso16-gpios = <&gpioc 3 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
709 kso17-gpios = <&gpioc 5 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
713 compatible = "ite,it8xxx2-sha";
719 compatible = "ite,it8xxx2-usbpd";
725 compatible = "ite,it8xxx2-usbpd";