Lines Matching full:cs
17 num-cs:
37 spi-sck-cs-delay:
41 deactivating Chip Select at the stop of transfer. If CS remains
44 This value will affect to all inner CS signals of SPI module when active.
45 This value will not be applied for CS lines controlled by GPIO.
47 spi-cs-sck-delay:
51 of clock signal at the start of transfer. If CS remains asserted
54 This value will affect to all inner CS signals of SPI module when active.
55 This value will not be applied for CS lines controlled by GPIO.
57 spi-cs-cs-delay:
62 next transfer. If CS remains asserted between transfer, this delay
65 This value will affect to all inner CS signals of SPI module when active.
66 This value will not be applied for CS lines controlled by GPIO.