Lines Matching +full:pll +full:- +full:enable

2 # SPDX-License-Identifier: Apache-2.0
6 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
8 compatible: "microchip,xec-pwmbbled"
27   clock-select:
32       - PWM_BBLED_CLK_AHB: Clock source is the PLL based AHB clock
33       - PWM_BBLED_CLK_SLOW: Clock source is the PLL based PCR slow clock
34       - PWM_BBLED_CLK_32K: Clock source is the 32KHz domain
36       - "PWM_BBLED_CLK_32K"
37       - "PWM_BBLED_CLK_SLOW"
38       - "PWM_BBLED_CLK_48M"
40   pinctrl-0:
43   pinctrl-names:
46   "#pwm-cells":
49   enable-low-power-32k:
53       - Main system clock (48MHz)
54       - 32KHz Core clock (32.768KHz)
58       Flag "enable-low-power-32k" shall be used along with 32KHz clock to blink (or) not blink
61 pwm-cells:
62   - channel
63   - period