Lines Matching +full:push +full:- +full:pull

4 # SPDX-License-Identifier: Apache-2.0
11   UART0 RX to a particular port/pin and enable the pull-up resistor on that
22   'bias-pull-up' property. Here is a list of the supported standard pin
24     * bias-high-impedance
25     * bias-pull-up
26     * bias-pull-down
27     * drive-open-drain
28     * drive-open-source
29     * drive-push-pull   (strong)
30     * input-enable      (input-buffer)
32   Infineon CAT1 SoC's devicetree includes a set of pre-defined pin control
38   Each MPN dtsi includes package dtsi (../psoc6_xx/psoc6_xx.yyy-zzz.dtsi),
39   For example, CY8C624ABZI_S2D44 includes "../psoc6_02/psoc6_02.124-bga.dtsi".
41   An example of pre-defined pin control from package dtsi (e.g. psoc6_02.124-bga.dtsi):
42   p3_0_scb2_uart_rx - RX pin UART2 (SCB2) which connected to port3.0
44     /omit-if-no-ref/ p3_0_scb2_uart_rx: p3_0_scb2_uart_rx {
48   Refer to psoc6_02.124-bga.dtsi for the list of all pre-defined pin control nodes.
50   NOTE1 Pre-defined pin control nodes use macro DT_CAT1_PINMUX to
54     zephyr\include\zephyr\dt-bindings\pinctrl\ifx_cat1-pinctrl.h file.
63   NOTE2 Pre-defined pin control nodes do not have bias pin configuration.
64     The bias configuration can be updated in board-pinctrl.dtsi
68         drive-push-pull;
72         input-enable;
76         drive-push-pull;
80         input-enable;
84   An example of the usage of pre-defined pin control nodes in your board's DTS file:
87       pinctrl-0 = <&p5_1_scb5_uart_tx &p5_0_scb5_uart_rx>;
88       pinctrl-names = "default";
93       drive-push-pull;
97       input-enable;
100 compatible: "infineon,cat1-pinctrl"
104 child-binding:
107     - name: pincfg-node.yaml
108       property-allowlist:
109         - bias-high-impedance
110         - bias-pull-down
111         - bias-pull-up
112         - drive-push-pull
113         - drive-open-drain
114         - drive-open-source
115         - input-enable