Lines Matching +full:low +full:- +full:speed

2 # SPDX-License-Identifier: Apache-2.0
7     use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
20       /* You can put this in places like a board-pinctrl.dtsi file in
24       /* include pre-defined combinations for the SoC variant used by the board */
25       #include <dt-bindings/pinctrl/gd32f403z(k-i-g-e-c-b)xx-pinctrl.h>
39             /* both PA10 and PA12 have pull-up enabled */
40             bias-pull-up;
55     for the sleep state (used in device low power mode). Note that analog mode
56     is used for low power states because it disconnects the pin pull-up/down
64     pins, such as the 'bias-pull-up' property in group 2. Here is a list of
67     - drive-push-pull: Push-pull drive mode (default, not required). Only
69     - drive-open-drain: Open-drain drive mode. Only applies for GPIO_IN mode.
70     - bias-disable: Disable pull-up/down (default, not required). Only applies
72     - bias-pull-up: Enable pull-up resistor. Only applies for GPIO_IN mode.
73     - bias-pull-down: Enable pull-down resistor. Only applies for GPIO_IN mode.
74     - slew-rate: Set the maximum speed (and so the slew-rate) of the output
79     Peripherals that are remappable will have their pre-defined macros suffixed
82       - CAN0_RX_PA11_NORMP: No remap
83       - CAN0_RX_PB8_PRMP: Partial remap
84       - CAN0_RX_PD0_FRMP: Full remap
99     To link pin configurations with a device, use a pinctrl-N property for some
102        #include "board-pinctrl.dtsi"
105              pinctrl-0 = <&usart0_default>;
106              pinctrl-1 = <&usart0_sleep>;
107              pinctrl-names = "default", "sleep";
110 compatible: "gd,gd32-pinctrl-afio"
112 include: gd,gd32-pinctrl-common.yaml
114 child-binding:
117   child-binding:
121       slew-rate:
123         default: "max-speed-2mhz"
125           - "max-speed-10mhz"
126           - "max-speed-2mhz"
127           - "max-speed-50mhz"
128           - "max-speed-highest"
130           Set the maximum speed of a pin. This setting effectively limits the
131           slew rate of the output signal. Defaults to "max-speed-2mhz", the SoC
132           default. The max-speed-highest option may not be available on all SoC
133           variants. If selected and not available the 50 MHz maximum speed will
134           be used instead. Note that usage of max-speed-highest may require
135           enabling the I/O compensation cell (refer to the gd,gd32-afio binding