Lines Matching +full:pll +full:- +full:enable

2 # SPDX-License-Identifier: Apache-2.0
5   Microchip MCP251XFD SPI CAN-FD controller
11       cs-gpios = <&mikrobus_header 2 GPIO_ACTIVE_LOW>;
17           spi-max-frequency = <18000000>;
18           int-gpios = <&mikrobus_header 7 GPIO_ACTIVE_LOW>;
20           osc-freq = <40000000>;
22           bus-speed = <125000>;
23           sample-point = <875>;
24           bus-speed-data = <1000000>;
25           sample-point-data = <875>;
31 include: [spi-device.yaml, can-fd-controller.yaml]
34   osc-freq:
39   int-gpios:
40     type: phandle-array
43       The interrupt signal from the controller is active low in push-pull mode.
47   pll-enable:
50       Enables controller PLL, which multiples input clock frequency x10.
51       This parameter also implicity sets whether the clock is from the PLL
53       If this option is enabled the clock source is the PLL, otherwise its
56   timestamp-prescaler:
64   sof-on-clko:
67       Output start-of-frame (SOF) signal on the CLKO pin every time
72   clko-div:
77       - 1
78       - 2
79       - 4
80       - 10